EE296 Working with the FPGA’s. (Field Programmable gate array) Team name: Altezza Team members: Richard Phomsouvanh (FPGA expert) Jason Leong (VHDL expert)

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Presentation transcript:

EE296 Working with the FPGA’s. (Field Programmable gate array) Team name: Altezza Team members: Richard Phomsouvanh (FPGA expert) Jason Leong (VHDL expert) Jason Leong (VHDL expert)

Overview of the Project Get familiar with FPGA’s Implement I 2 C protocol using the FPGA Further experiment with the capabilities of the FPGA.

The Approach There are three steps to our approach to this project: 1. Implement I 2 C protocol in VHDL. 1. Task 3 2. Get familiar with the Cyclone II FPGA. 3. Program the Cyclone II to transfer one byte of data using the I 2 C design.

Potential Problems Mistakes in coding the VHDL files Mistakes in coding the VHDL files Mistakes in programming the FPGA Mistakes in programming the FPGA Misuse of the FPGA Misuse of the FPGA

What we will learn We will Learn more about the I 2 C protocol and how it works. We will Learn more about the I 2 C protocol and how it works. Learn how to use FPGA’s Learn how to use FPGA’s Learn how to implement VHDL with FPGA’s Learn how to implement VHDL with FPGA’s Advanced debugging skills Advanced debugging skills

What we will Produce In the end we want to be able to transfer one byte of data from the I 2 C master to the I 2 C Slave successfully. Any other variations of working with FPGA’s is also a goal for us if we succeed with the data transfer part.

Ala gantt chart 3/152/11/282/153/13/294/125/7 Tasks Task circuit files AU/DU/Count Convert CCT to VHDL Task Tutorials Clock Task Master/Slave Controllers AU/DU/Count Top Layer Two boards talk LCD ???