Processor Architecture Kieran Mathieson. Outline Memory CPU Structure Design a CPU Programming Design Issues.

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Presentation transcript:

Processor Architecture Kieran Mathieson

Outline Memory CPU Structure Design a CPU Programming Design Issues

Memory

Made up of bits Fixed word (cell) size Cells contain instructions and data Each word has an address Flat memory model Segmented memory model

CPU Structure

Fetch/execute cycle Registers used to operate on data Scratchpad Special-purpose registers – instruction register, instruction pointer, program status word Control unit interprets instructions Opens and closes the right gates to move data around ALU performs computations

Design a CPU Decimal for simplicity 1,000 word of RAM - each 4 digits long 10 registers – numbered 0 to 9 Special-purpose registers - instruction register, instruction pointer Create an instruction set Input/output Move data between registers and memory Computation Branching

Program Write a program to input two numbers, add them, and output Write a program to add up some numbers the user inputs The user specifies how many numbers to add

What It Looks Like

CPU Design Issues Word size CISC vs. RISC Clock speed Electrical properties – heat, circuit length, fabrication

Outline Memory CPU Structure Design a CPU Programming Design Issues