CROSSBAR LAN TEAM 8 CURTIS PETE D. ERIC ANDERSON DANIEL HYINK JOHN MUFARRIGE.

Slides:



Advertisements
Similar presentations
Nios Multi Processor Ethernet Embedded Platform Final Presentation
Advertisements

Provide data pathways that connect various system components.
IO Interfaces and Bus Standards. Interface circuits Consists of the cktry required to connect an i/o device to a computer. On one side we have data bus.
Accessing I/O Devices Processor Memory BUS I/O Device 1 I/O Device 2.
PROGRAMMABLE PERIPHERAL INTERFACE -8255
EXTERNAL COMMUNICATIONS DESIGNING AN EXTERNAL 3 BYTE INTERFACE Mark Neil - Microprocessor Course 1 External Memory & I/O.
LabVIEW 7.1 Tutorial. Measurement Lab. MECH262-MECH261 Imran Haider Malik January 16, 2006.
Shift Register Application Chapter 22 Subject: Digital System Year: 2009.
PH4705 ET4305 Interface Standards A number of standard digital data interfaces are used in measurement systems to connect instruments and computers for.
Using an FPGA to Control the Protection of National Security and Sailor Lives at Sea Brenda G. Martinez, Undergraduate Student K.L. Butler-Purry, Ph.D.,
Intro Test 2 – Chapters 3,4 & Word Sample Questions SPRING 2005.
Mid semester Presentation Data Packages Generator & Flow Management Data Packages Generator & Flow Management Data Packages Generator & Flow Management.
Data Acquisition Hardware By Joe Eastman. 3-Feb-03Joe Eastman Types of Hardware PCI and ISA Boards PCMCIA Cards USB Serial Port.
Chapter 10 Switching Fabrics. Outline Physical Interconnection Physical box with backplane Individual blades plug into backplane slots Each blade contains.
PALM-3000 ATST/BBSO Visit Stephen Guiwits P3K System Hardware 126 Cahill February 11, 2010.
Input/Output and Communication
System Components Hardware overview for Apollo ACS.
Parallel Connections Michael Fromwiller CS 147 Spring 08 Dr. Sin-Min Lee This presentation will probably involve audience discussion, which will create.
INPUT/OUTPUT ARCHITECTURE By Truc Truong. Input Devices Keyboard Keyboard Mouse Mouse Scanner Scanner CD-Rom CD-Rom Game Controller Game Controller.
Digital signature using MD5 algorithm Hardware Acceleration
Advanced Computers and Communications (ACC) Faculty Advisors: Dr. Charles Liu Dr. Helen Boussalis 10/25/20121NASA Grant URC NCC NNX08BA44A Student Assistants:
E-LABORATORY PRACTICAL TEACHING FOR APPLIED ENGINEERING SCIENCES W O R K S H O P University of Oradea, Romania February 6, 2012 G E N E R A L P R E S E.
LECTURE 9 CT1303 LAN. LAN DEVICES Network: Nodes: Service units: PC Interface processing Modules: it doesn’t generate data, but just it process it and.
LSU 10/22/2004Serial I/O1 Programming Unit, Lecture 5.
AS Computing F451 F451 Data Transmission. What data is transmitted? Phone SMS Radio TV Internet.
COE4OI5 Engineering Design Chapter 2: UP2/UP3 board.
“ Analyzer for 40Gbit Ethernet “ (Bi-semestrial project) Executers: פריד מחאג ' נה Farid Mahajna Husam Kadan חוסאם קעדאן Instructor:
Ch Review1 Review Chapter Microcomputer Systems Hardware, Software, and the Operating System.
66 CHAPTER THE SYSTEM UNIT. 2 System Units in Microcomputers System Units (system cabinet):container that contain the electronic components of computer.
Copyright © 2007 Heathkit Company, Inc. All Rights Reserved PC Fundamentals Presentation 43 – The Network Interface Card (NIC)
LOGO BUS SYSTEM Members: Bui Thi Diep Nguyen Thi Ngoc Mai Vu Thi Thuy Class: 1c06.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
1 LabVIEW DSP Test Integration Toolkit. 2 Agenda LabVIEW Fundamentals Integrating LabVIEW and Code Composer Studio TM (CCS) Example Use Case Additional.
Devices and Buses for Device Networks By: Prof. Mahendra B. Salunke Asst. Prof., Department of Computer Engg, SITS, Pune-41 URL:
PROCStar III Performance Charactarization Instructor : Ina Rivkin Performed by: Idan Steinberg Evgeni Riaboy Semestrial Project Winter 2010.
SPEED RACE BY LEARNING ON THE WHEEL How to make the hardware.
Motherboard and Bios. Generic Modern Motherboard.
8279 KEYBOARD AND DISPLAY INTERFACING
Universal Asynchronous Receiver/Transmitter (UART)
CS-350 TERM PROJECT COMPUTER BUSES By : AJIT UMRANI.
An Overview of LabVIEW by: The Software User-Interface Group!
Embedded Network Interface (ENI). What is ENI? Embedded Network Interface Originally called DPO (Digital Product Option) card Printer without network.
HOME AUTOMATION: WEB BASED CONTROL Anthony Campbell Eric Poynter EKU, Dept. of Technology Computer Electronic Networking.
PPI-8255.
PC Internal Components Lesson 4.  Intel is perhaps the most recognizable microprocessor manufacturer. List some others.
8279 KEYBOARD AND DISPLAY INTERFACING
1 Chapter 2 Central Processing Unit. 2 CPU The "brain" of the computer system is called the central processing unit. Everything that a computer does is.
Device Interface Board for Wireless LAN Testing
KEYBOARD INTERFACING Keyboards are organized in a matrix of rows and columns The CPU accesses both rows and columns through ports. ƒTherefore, with two.
US Peripheral Crate VMEbus Controller Ben Bylsma EMU – ESR CERN, November 2003.
1 Technion – Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Lab Instructor: Evgeny Fiksman Students: Meir.
بسم الله الرحمن الرحيم MEMORY AND I/O.
Dynamically Reconfigurable Neurons. This presentation summaries the progression achieved up to date. Artificial Neural Networks Implementing the ANNs.
Spring 2000CS 4611 Router Construction Outline Switched Fabrics IP Routers Extensible (Active) Routers.
8255:Programmable Peripheral Interface
10/15: Lecture Topics Input/Output –Types of I/O Devices –How devices communicate with the rest of the system communicating with the processor communicating.
Device Interface Board for Wireless LAN Testing Team May Client ECpE Department Faculty Advisor Dr. Weber Team Members Nathan Gibbs – EE Adnan Kapadia.
Networked Embedded Systems Pengyu Zhang EE107 Spring 2016 Lecture 8 Serial Buses.
OCR AS Level F451: Data transmission Data transmission a. Describe the characteristics of a LAN (local area network) and a WAN (wide area network);
NETWORK DESIGN.
Input/Output and Communication
Operating Systems (CS 340 D)
Group Manager – PXI™/VXI Software
CS 286 Computer Organization and Architecture
Lesson 2: Introduction to Control programming using Labview
Serial Data Hub (Proj Dec13-13).
HOME AUTOMATION: WEB BASED CONTROL
Programmable Peripheral Interface
NetFPGA - an open network development platform
Chapter 13: I/O Systems.
Presentation transcript:

CROSSBAR LAN TEAM 8 CURTIS PETE D. ERIC ANDERSON DANIEL HYINK JOHN MUFARRIGE

Overview Network connection using a 4 x 4 crossbar implemented on FPGA Interface to crossbar using 3 National Instruments DIO32 cards and 1 National Instruments DIO96 card Cards are controlled using C programming and LabVIEW virtual instruments

Hardware Issues Had to wire a new FPGA board for our data communications.

Hardware Issues Problems implementing FIFOs onto FPGA –ground loop was discovered between DI/O ground and serial port ground of PC causing bad FPGA programming –clocks used to latch data required debouncers to work properly

Project Achievements Establish a bi-directional connection of 2 workstations using NI DIO-32HS PCI interface cards. Using a parallel 8-bit wide interface LabVIEW and C were used to control I/O cards

C Software Achievements Initially used software implemented handshaking to control the cards

C Software Achievements Data I/O cards were connected directly to each other

C Software Achievements Next, the cards were connected through FIFOs

C Software Achievements Data was latched into/out of FIFOs using external asynchronous clocks

C Software Achievements Data packeting was introduced into the software

C Software Achievements Final software uses a command line interface to perform tasks

LabVIEW Achievements Used as an alternative to C for driving data among PC’s. LabVIEW was supposed to be simpler to program and provide similar performance to C. Built input and output programs to send and receive data between 2 PCs

Input Program Front Panel

Output Front Panel with Timing

LabVIEW Timing Results Speed was calculated by dividing the number of bytes sent by the elapsed time.

C Software Timing Results

Conclusion The interface to the crossbar is complete. –The software works independently of whether or not there is a crossbar implemented between the FIFOs. From our timing data, we can conclude that LabVIEW is not a feasible solution for controlling the DI/O cards.