E-Voting Machine - Design Presentation Group M1 Bohyun Jessica Kim Jonathan Chiang Chi Ho Yoon Donald Cober Wed, Oct 15 Schematics ¾ done SRAM cell layout Updated floor plan Secure Electronic Voting Terminal

This week… Schematics ¾ done SRAM cell layout and specifications Updated floorplan Next week… Finish schematics Start layout Simulation Results Status Update

FSM’s schematic

COMMS Schematic

COMMS cont’d (smaller blocks) Full Adder 1bit Full Adder 8bit

COMMS cont’d (smaller blocks) FF 8 bitFull Adder shifted by 4 bits

SRAM schematic

SRAM cont’d (decoder) Full Adder 1bit

SRAM layout

Updated Floorplan

Questions? Thank you!