Logic Synthesis 3 Outline –Multi-Level Logic Optimization –Local Transformations –Weak Division Goal –Understand multi-level optimization –Understand local.

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Presentation transcript:

Logic Synthesis 3 Outline –Multi-Level Logic Optimization –Local Transformations –Weak Division Goal –Understand multi-level optimization –Understand local transformations –Understand weak division

Multi-Level Logic Optimization Often prefer random logic over PLA –faster, less area, lower power,... –example »C2670 has 233 inputs, 140 outputs »would require huge sparse PLA »random logic is 1193 gates, depth of 33 Two-level logic is unsuitable for random logic –high fan-in gates are big and slow Transform two-level to multi-level logic –permit more functions than AND, OR

Local Optimization Rule-based local transformations –apply transformation that reduces cost –repeat until no rules fire –IBM Logic Synthesis System –Trimeter Design Assistant Transformations –reduce size, power, delay Problems –rule set development »more rules is better –verification that rules completely explore design space Expansion AND/OR simplification Common subexpr. elim. Constant propagation NAND(NOR) simplification Common subexpr. elim. Specification Simple translation AND/OR Level NAND(NOR) Level Technology Mapping

AND/OR Transformations –reduce size, critical path –NOT(NOT(a)) => a –AND(a, NOT(a)) => 0 –OR(a, NOT(a)) => 1 –OR(a, AND(NOT(a), b)) => OR(a,b) –XOR(PARITY(a1,...,an), b) => PARITY(a1,...,an, b) –AND(a, 1) => a –OR(a, 1) => 1 –etc. NAND(NOR) Translation a 1 bb a b a

NAND(NOR) Transformations a b c IBM was targeting NAND and NOR gate arrays –all gates one type –eliminated need for technology mapping step a b c a b d a b c c a b d

Example Algorithm Flow in Each Level while not done { for all transformation rules for all nodes in current circuit if rule can be applied at node insert (rule, node) into ordered list order by cost reduction if (no rules reduce cost) done else apply rule with largest cost reduction }

Algorithm Analysis Complexity is too high? –R rules, C circuit nodes –O(RC log RC) to order rules »RC to identify rules »RC log RC to order rules by cost reduction –must repeat for every many rule applications Solution: lazy evaluation –only need to check few circuit nodes affected by last rule application –if cost evaluation can be done locally »potential problem if checking longest path delay –O(R log R) per rule application –potentially reduce further

Global Optimization - Weak Division Weak Division –divide out common subexpressions –reduces literal count –GE Socrates Global Optimization –look at all equations at once f 1 = aef + bef + ceg f 2 = aeg + bg + def Generate candidate subexpressions Select subexpression Divide functions by subexpressions Original equations 17 literals Subexp ef a+b ae eg literals saved 4 2 t 1 = ef f 1 = (a + b)t 1 + ceg f 2 = aeg + bg + dt 1 t 1 = ef Equations after first iteration 13 literals

Weak Division Generate candidate subexpressions Select subexpression Divide functions by subexpressions Subexp eg literals saved 2 t 2 = eg f 1 = (a + b)t 1 + ct 2 f 2 = at 2 + bg + dt 1 t 1 = ef t 2 = eg Equations after second iteration 11 literals f 1 = (a + b)t 1 + ceg f 2 = aeg + bg + dt 1 t 1 = ef Equations after first iteration 13 literals All subexpressions are unique => stop Two-level equation converts to multi-level equation

General Optimization Issues Candidate generation –too expensive to generate them all –weak division »sort terms in order of size –local transformations »random selection Candidate selection –many “best” candidates, which to select? »by most literals saved in Socrates »apply “best” rule in LSS –can get stuck in local minimum –search and backtrack –iterative improvement »gasp functions in ESPRESSO Cost: 8Cost: 2