G.Villani jan. 071 CALICE pixel Deep P-Well results Nwell ≈ 900 μm 2 P-well 1μm ring gap Collecting diodes 3.6 x 3.6 μm 2 Bias: NWell 3.5V Diodes: 1.5V.

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G.Villani jan. 071 CALICE pixel Deep P-Well results Nwell ≈ 900 μm 2 P-well 1μm ring gap Collecting diodes 3.6 x 3.6 μm 2 Bias: NWell 3.5V Diodes: 1.5V 50 μm x 50 μm pixel size P-well contact ground Hit points

G.Villani jan. 072 CALICE pixel Deep P-Well results Nwell 3.6 x 3.6 μm 2 P-well 1μm ring gap Collecting diodes 3.6 x 3.6 μm 2 Bias: NWell 3.5V Diodes: 1.5V 50 μm x 50 μm pixel size P-well contact ground Hit point P-well 5μm guard ring

G.Villani jan. 073 CALICE pixel Deep P-Well results ≈ 144 mV ≈ 202 mV ≈ 9.5 μm V μmμm μmμm top Epitaxial layer potential well Deep P Well Ring z= 31 μm)

G.Villani jan. 074 CALICE pixel Deep P-Well results Single pixel results No Pwell Guard ring Diodes Charge collected (e - ) e-e- 92 ns/31e - NW 161 ns /352e - NW55 ns/71e - NW 139 ns/103e - NW D t c / NW Charge collected

G.Villani jan. 075 CALICE pixel Deep P-Well results Single pixel results 5 μm Pwell Guard ring 238 e - Diodes /1e - NW/ 107 ns t c

G.Villani jan. 076 ConclusionsConclusions The layout with increased central well size shows a decrease in efficiency of charge collection: however, a S/N min should still exceed 10 Collection time still well below 200 ns. P Well Guard ring of 5 μm makes worst hit (21) lower but still acceptable with 3.6 μm central N Well Next step: Different size diodes simulations (7.6 / 1.8 μm) Final layout simulation CALICE pixel Deep P-Well results

G.Villani jan. 077 CALICE pixel Deep P-Well results Narrow ( 3 μm ?) P-Well guard ring around each pixel