Arithmetic III CPSC 321 Andreas Klappenecker

Any Questions?

Today’s Menu Addition Multiplication Floating Point Numbers

Recall: Full Adder c in a b c out s 3 gates delay for first adder, 2(n-1) for remaining adders

Ripple Carry Adders Each gates causes a delay our example: 3 gates for carry generation book has example with 2 gates Carry might ripple through all n adders O(n) gates causing delay intolerable delay if n is large Carry lookahead adders

Faster Adders c in a b c out s c out =ab+c in (a xor b) =ab+ac in +bc in =ab+(a+b)c in = g + p c in Generate g = ab Propagate p = a+b Why are they called like that?

Fast Adders Iterate the idea, generate and propagate c i+1 = g i + p i c i = g i + p i (g i-1 + p i-1 c i-1 ) = g i + p i g i-1 + p i p i-1 c i-1 = g i + p i g i-1 + p i p i-1 g i-2 +…+ p i p i-1 …p 1 g 0 +p i p i-1 …p 1 p 0 c 0 Two level AND-OR circuit Carry is known early!

Need to support the set-on-less-than instruction (slt) remember: slt is an arithmetic instruction produces 1 if rs < rt and 0 otherwise use subtraction: (a-b) < 0 implies a < b Need to support test for equality (beq $t5, $t6, $t7) use subtraction: (a-b) = 0 implies a = b A Simple ALU for MIPS

ALU 000 = and 001 = or 010 = add 110 = subtract 111 = slt Note: zero is a 1 when the result is zero!

Multipliers

More complicated than addition accomplished via shifting and addition Let's look at 3 versions based on the grade school algorithm 0010 (multiplicand) __ x_1011 (multiplier) 0010 x x x x Shift and add if multiplier bit equals 1 Multiplication

0010 (multiplicand) __ x_1011 (multiplier) 0010 x x x x

Multiplication  If each step took a clock cycle, this algorithm would use almost 100 clock cycles to multiply two 32-bit numbers.  Requires 64-bit wide adder  Multiplicand register 64-bit wide

Variations on a Theme Product register has to be 64-bit Nothing we can do about that! Can we take advantage of that fact? Yes! Add multiplicand to 32 MSBs product = product >> 1 Repeat last steps 0010 (multiplicand) __ x_1011 (multiplier) 0010 x x x x

Second Version

Version 1 versus Version 2

Critique Registers needed for multiplicand multiplier product Use lower 32 bits of product register: place multiplier in lower 32 bits add multiplicand to higher 32 bits product = product >> 1 repeat

Final Version Multiplier (shifts right)

Summary It was possible to improve upon the well-known grade school algorithm by reducing the adder from 64 to 32 bits keeping the multiplicand fixed shifting the product register omitting the multiplier register

The Booth Multiplier Let’s kick it up a notch!

Runs of 1’s = 14 = = 16 – 2 Runs of 1s (current bit, bit to the right): 10 beginning of run 11 middle of a run 01 end of a run of 1s 00 middle of a run of 0s

Run’s of 1’s = 2044 How do you get this conversion quickly? = 128 – 1 = = 2048 – = 2048 – 1 – 3 = 2048 – 4

shift sub 0000 shift 0010 add Example shift 0010 add 0000 shift

Booth Multiplication Current and previous bit 00: middle of run of 0s, no action 01: end of a run of 1s, add multiplicand 10: beginning of a run of 1s, subtract mcnd 11: middle of string of 1s, no action

Example: 0010 x 0110 IterationMcandStepProduct Initial values , : no op arith>> , , : prod-=Mcand arith>> , , : no op arith>> , , : prod+=Mcand arith>> , ,0

Negative numbers Booth’s multiplication works also with negative numbers: 2 x -3 = x =

Negative Numbers x = ) Mcnd 0010 Prod ,0 1) Mcnd 0010 Prod ,1 sub 1) Mcnd 0010 Prod ,1 >> 2) Mcnd 0010 Prod ,1 add 2) Mcnd 0010 Prod ,0 >> 3) Mcnd 0010 Prod ,0 sub 3) Mcnd 0010 Prod ,1 >> 4) Mcnd 0010 Prod ,1 nop 4) Mcnd 0010 Prod ,1 >>

Summary Extends the final version of the grade school algorithm Simple change: add, subtract, or do nothing if last and previous bit respectively satisfy 0,1; 1,0 or 0,0; 1, = 128 – 4 = –

Floating Point Numbers

We often use calculations based on real numbers, such as e = … Pi = … We represent approximations to such numbers by floating point numbers 1.xxxxxxxxxx 2 x 2 yyyy

Floating-Point Representation: float We need to distribute the 32 bits among sign, exponent, and significand seeeeeeeexxxxxxxxxxxxxxxxxxxxxxx The general form of such a number is (-1) s x F x 2 E s is the sign, F is derived from the significand field, and E is derived from the exponent field

Floating Point Representation: double 1 bit sign, 11 bits for exponent, 52 bits for significand seeeeeeeeeeexxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx Range of float: 2.0 x … 2.0 x Range of double: 2.0 x … 2.0 x

IEEE 754 Floating-Point Standard Makes leading bit of normalized binary number implicit 1 + significand If significand is s1 s2 s3 s4 s5 s6 … then the value is (-1)s x (1 + s1/2 + s2/4 + s3/8 + … ) 2 E Design goal of IEEE 754: Integer comparisons should yield meaningful comparisons for floating point numbers

IEEE 754 Standard Negative exponents are a difficulty for sorting Idea: most positive … most negative … IEEE 754 uses a bias of 127 for single precision. Exponent -1 is represented by = 126

IEEE 754 Example Represent in single precision format = -3/4 = / 4 = In scientific notation: x 2 0 = -1.1 x 2 -1 the latter form is normalized sc. notation Value: (-1)s x (1+ significand) x 2 (Expnt – 127)

Example (cont’d) -1.1 x 2-1 = (-1)1 x ( ) x 2 (126 – 127) The single precision representation is BAM!

Conclusion We learned how to multiply Three variations on the grade school algorithm Booth multiplication Floating point representation a la IEEE 754 (Photo’s are courtesy of some graphs are due to Patterson and Hennessy)