Quantity  A generic mechanism to model performance In platform-based design, two pieces of information are required to capture the characteristics of.

Slides:



Advertisements
Similar presentations
INTERVAL Next Previous 13/02/ Timed extensions to SDL Analysis requirements –Assumptions on moments and duration Semantics with controllable time.
Advertisements

ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2004 Serdar Taşıran.
Simulation Verification of Different Constraints in System Level Design in SystemC Piyush Ranjan Satapathy CS220 Class Project Presentation.
Department of Computer Science and Engineering University of Washington Brian N. Bershad, Stefan Savage, Przemyslaw Pardyak, Emin Gun Sirer, Marc E. Fiuczynski,
Software Process Models
Introduction to Rational Rose 2000 v6.5 Copyright © 1999 Rational Software, all rights reserved 1 Rational Rose 2000 Interaction Diagrams.
Using the Crosscutting Concepts As conceptual tools when meeting an unfamiliar problem or phenomenon.
LASER From Natural Language Requirements to Rigorous Property Specifications Lori A. Clarke Work done in collaboration with Rachel L. Smith, George S.
ISBN Chapter 3 Describing Syntax and Semantics.
Atomicity in Multi-Threaded Programs Prachi Tiwari University of California, Santa Cruz CMPS 203 Programming Languages, Fall 2004.
OASIS Reference Model for Service Oriented Architecture 1.0
Component Patterns – Architecture and Applications with EJB copyright © 2001, MATHEMA AG Component Patterns Architecture and Applications with EJB JavaForum.
Architecture-driven Modeling and Analysis By David Garlan and Bradley Schmerl Presented by Charita Feldman.
Discrete Event System Modeling and Simulation in Metropolis Guang Yang 12/10/2004.
Causality Interface  Declares the dependency that output events have on input events.  D is an ordered set associated with the min ( ) and plus ( ) operators.
Implementing Quantity Managers in Ptolemy II EE 290N Project Haibo Zeng Dec 10 th, 2004.
Metro II : A Next-Generation Framework for Platform-based Design Abhijit Davare, Douglas Densmore, Trevor Meyerowitz, Alessandro Pinto, Alberto Sangiovanni-Vincentelli,
Chess Review May 10, 2004 Berkeley, CA Platform-based Design for Mixed Analog-Digital Designs Fernando De Bernardinis, Yanmei Li, Alberto Sangiovanni-Vincentelli.
February 21, 2008 Center for Hybrid and Embedded Software Systems Mapping A Timed Functional Specification to a Precision.
SEC PI Meeting Annapolis, May 8-9, 2001 Component-Based Design of Embedded Control Systems Edward A. Lee & Jie Liu UC Berkeley with thanks to the entire.
A Platform-based Design Flow for Kahn Process Networks Abhijit Davare Qi Zhu December 10, 2004.
November 18, 2004 Embedded System Design Flow Arkadeb Ghosal Alessandro Pinto Daniele Gasperini Alberto Sangiovanni-Vincentelli
Describing Syntax and Semantics
Platform-based Design for Mixed Analog-Digital Designs Fernando De Bernardinis, Yanmei Li, Alberto Sangiovanni-Vincentelli May 10, 2004 Analog Platform.
Copyright Arshi Khan1 System Programming Instructor Arshi Khan.
Spectra Software Defined Radio Products Applying Model Driven Design, Generative Programming, and Agile Software Techniques to the SDR Domain OOPSLA '05.
Katanosh Morovat.   This concept is a formal approach for identifying the rules that encapsulate the structure, constraint, and control of the operation.
Workshop - November Toulouse Ronan LUCAS - Magillem Design Services 07/04/2011.
Copyright © 2012 Accenture All Rights Reserved.Copyright © 2012 Accenture All Rights Reserved. Accenture, its logo, and High Performance Delivered are.
IAY 0600 Digitaalsüsteemide disain Event-Driven Simulation Alexander Sudnitson Tallinn University of Technology.
Rethinking Game Architecture with Immutability Jacob Dufault Faculty Advisor: Dr. Phil Bernhard, Dept of Computer Science, Florida Institute of Technology.
COP 4620 / 5625 Programming Language Translation / Compiler Writing Fall 2003 Lecture 10, 10/30/2003 Prof. Roy Levow.
Building Tools by Model Transformations in Eclipse Oskars Vilitis, Audris Kalnins, Edgars Celms, Elina Kalnina, Agris Sostaks, Janis Barzdins Institute.
1 H ardware D escription L anguages Modeling Digital Systems.
SWE © Solomon Seifu ELABORATION. SWE © Solomon Seifu Lesson 10 Use Case Design.
Software Development. Software Developers Refresher A person or organization that designs software and writes the programs. Software development is the.
Fast Simulation Techniques for Design Space Exploration Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet
1 Compiler Construction (CS-636) Muhammad Bilal Bashir UIIT, Rawalpindi.
Requirements as Usecases Capturing the REQUIREMENT ANALYSIS DESIGN IMPLEMENTATION TEST.
16 August Verilog++ Assertion Extension Requirements Proposal.
Chapter 10 Analysis and Design Discipline. 2 Purpose The purpose is to translate the requirements into a specification that describes how to implement.
Review of Software Process Models Review Class 1 Software Process Models CEN 4021 Class 2 – 01/12.
UML Class Diagram Trisha Cummings. What we will be covering What is a Class Diagram? Essential Elements of a UML Class Diagram UML Packages Logical Distribution.
Handling Mixed-Criticality in SoC- based Real-Time Embedded Systems Rodolfo Pellizzoni, Patrick Meredith, Min-Young Nam, Mu Sun, Marco Caccamo, Lui Sha.
Effort.vs. Software Product “Quality” Effort Product “Quality” Which curve? - linear? - logarithmic? - exponential?
EXTENSIBILITY, SAFETY AND PERFORMANCE IN THE SPIN OPERATING SYSTEM
6. A PPLICATION MAPPING 6.3 HW/SW partitioning 6.4 Mapping to heterogeneous multi-processors 1 6. Application mapping (part 2)
Chapter 9 Putting together a complete system. This chapter discusses n Designing a complete system. n Overview of the design and implementation process.
16/11/ Semantic Web Services Language Requirements Presenter: Emilia Cimpian
Testing OO software. State Based Testing State machine: implementation-independent specification (model) of the dynamic behaviour of the system State:
Constraints Assisted Modeling and Validation Presented in CS294-5 (Spring 2007) Thomas Huining Feng Based on: [1]Constraints Assisted Modeling and Validation.
Session 07 Module 13 - Collections. Collections / Session 7 / 2 of 32 Review  A delegate in C# is used to refer to a method in a safe manner.  To invoke.
SWE 4743 Abstraction Richard Gesick. CSE Abstraction the mechanism and practice of abstraction reduces and factors out details so that one can.
1 Program Development  The creation of software involves four basic activities: establishing the requirements creating a design implementing the code.
Petter Nielsen Information Systems/IFI/UiO 1 Systems development Methodologies IN364.
UML - Development Process 1 Software Development Process Using UML.
IAY 0600 Digital Systems Design Event-Driven Simulation VHDL Discussion Alexander Sudnitson Tallinn University of Technology.
Refining the Use Cases 1. How Use Cases Evolve  Early efforts typically define most of the major use cases.  The refining stages complete the process.
Object orientation and Packaging in Java Object Orientation and Packaging Introduction: After completing this chapter, you will be able to identify.
T EST T OOLS U NIT VI This unit contains the overview of the test tools. Also prerequisites for applying these tools, tools selection and implementation.
CHAPTER 8 Scope, Lifetime, and More on Functions.
Graphical editor for the Metropolis meta-model Jiagen Ding and Hongjing Zou Fall 2001.
IHP Im Technologiepark Frankfurt (Oder) Germany IHP Im Technologiepark Frankfurt (Oder) Germany ©
Interface specifications At the core of each Larch interface language is a model of the state manipulated by the associated programming language. Each.
Language = Syntax + Semantics + Vocabulary
IAY 0600 Digitaalsüsteemide disain
SysML v2 Formalism: Requirements & Benefits
IAY 0600 Digital Systems Design
JavaScript Arrays.
UML State Diagrams.
Presentation transcript:

Quantity  A generic mechanism to model performance In platform-based design, two pieces of information are required to capture the characteristics of a platform. - Services provided by the platform - Performance (costs) of these services In Metropolis, all services provided by a platform can be abstracted by an object called interface. The performance or cost of these services are modeled by quantities. An example using GlobalTime quantity Performance Modeling Define different quantities for different performance indices. Add performance models to platform by annotating quantities to services provided by the platform. (Including quantity annotation request phase and quantity resolution phase.) Based on the quantities, it is easy to evaluate the performance of the platform, and it is easy to enforce the performance of the services with declarative constraints. Declarative Constraints Mixing imperative specification and declarative constraints is one of the key features of Metropolis. Declarative constraints can be used to specify the properties of the platform. They significantly reduce the development efforts, especially at the very beginning of the design cycle, where the properties themselves are of great importance while the realization is not. This allows designers to focus on the abstract behavior of the system, not the implementation of the system. To support this methodology, tools such as simulator must be able to enforce the constraints automatically. LTL & LOC There are two sorts of declarative constraints: Linear Temporal Logic (LTL) and Logic of Constriants (LOC). LTL is to specify coordination among events or services. It can be enforced by keeping track of Buchi Automata. Please refer to my previous Chess review posters. LOC is defined over quantities and variables. LOC is a general logic such that it can refer to all variables and quantities occurred in the entire execution. In theory, it can express almost all runtime properties of a system. Built-in LOC Constraints Although LOC is powerful enough to express many types of constraints, in practice, only a set of such constraints are usually used. To ease the performance modeling, Metropolis provides a set of built-in LOC constraints, including maxrate, minrate, maxdelta, mindelta and period. Do not be misled by their names. They are not only constraints about execution time. They just define the mathematical relationship for quantities. For example, maxdelta specifies the distance between two events must be no more than a certain value. In time domain, this corresponds to the maximum latency between the two events; in priority domain, this probably means one event can not have more than some level of priorities over another event, etc. Enforcing Built-in LOC Constraints The regular execution flow of quantity annotation is that processes first make quantity annotation requests to a quantity manager, then the quantity manager works on the set of requests. One biggest problem in enforcing LOC constraints is that when resolving quantities, the set of requests might not consist of the November 18, 2004 Performance Modeling and Built-in Logic of Constraints in Metropolis Guang Yang Professor Alberto Sangiovanni- Vincentelli Platform Design-Space Export Platform Mapping Architectural Space Application Space Application Instance Platform Instance System Platform (HW and SW) Scheduling Netlist P0 M GlobalTime SM SMSM SMSM Netlist P1P1 process P1{ port writer Y; thread(){ while(true){ z=z+1; beg{ requestI(0); } Y.write(z); end{ begTime = A(LAST); request(begTime+4); }}} process c0{ port reader X; thread(){ while(true){ beg{ requestI(0); } X.read(); end{ begTime = A(LAST); request(begTime+3); }} LOC maxrate(X.read, 10); } c0 GlobalTime Annotation Requests public final quantity GlobalTime implements GlobalTimeManager { double _gtime; public update double sub(double t1, double t2) { return t1 - t2; } public eval boolean equal(double t1, double t2) { return t1 == t2; } public eval boolean less(double t1, double t2) { return t1 < t2; } public eval double A();// annotate an event public eval void request();// make quantity annotation request public update void resolve();// resolve all annotation requests public update postcond();// clean up after resolve() public eval boolean stable();// check whether a resolution stabilize public elaborate eval Quantity getQuantity(); // return the quantity itself for built-in LOC public update registerLOC();// register built-in LOCs public update unregisterLOC();// unregister built-in LOCs } process c0{ port reader X; thread(){ while(true){ beg{ requestI(0); } X.read(); end{ begTime = A(LAST); request(begTime+3); }} LOC maxrate(X.read, 10); } process c0{ port reader X; thread(){ while(true){ registerLOC(X.read, 10); beg{ requestI(0); } X.read(); end{ begTime = A(LAST); request(begTime+3); }} unregisterLOC(X.read, 10); } events constrained by the built-in LOC. To handle this, registerLOC and unregisterLOC are introduced. In quantity managers, resolve function should take care of such LOCs. In particular, in GlobalTime quantity manager, if there are LOC constraints, it should reserve the required quantity for the events, even if the events are disabled, because otherwise when they becomes enabled, they will stuck.