M2: Team Paradigm :: Milestone 5 2-D Discrete Cosine Transform Group M2: Tommy Taylor Brandon Hsiung Changshi Xiao Bongkwan Kim Project Manager: Yaping.

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Presentation transcript:

M2: Team Paradigm :: Milestone 5 2-D Discrete Cosine Transform Group M2: Tommy Taylor Brandon Hsiung Changshi Xiao Bongkwan Kim Project Manager: Yaping Zhan

M2: Team Paradigm Team Paradigm

M2: Team Paradigm Project status  Design Proposal (Complete)  Architecture Proposal (Complete)  Behavioral Verilog and test bench (Done)  Schematic (Done)  Verilog verification of full-chip schematic (done)  Component layout  Registers, Adder/Subtractor (done)  SRAM (70% done)  MUX, counters ?  ROMs ?

M2: Team Paradigm XOR

M2: Team Paradigm Registers

M2: Team Paradigm Single Bit Register

M2: Team Paradigm 16bit Register

M2: Team Paradigm 16bit Register Closeup

M2: Team Paradigm MUX

M2: Team Paradigm 2:1 mux

M2: Team Paradigm 16 bit 2:1 mux

M2: Team Paradigm 16 bit 2:1 mux closeup

M2: Team Paradigm Adder & Subtractor

M2: Team Paradigm Mirror Adder

M2: Team Paradigm 16bit Adder

M2: Team Paradigm Mirror Adder 16bit Closeup

M2: Team Paradigm Subtractor :Adder with input inverted...and first bit carry in set to gnd.

M2: Team Paradigm 64x16 Dual Port SRAM

M2: Team Paradigm 64x16 dual port SRAM --- basic cell schematic

M2: Team Paradigm 64x16 dual port SRAM --- basic cell layout

M2: Team Paradigm 64x16 dual port SRAM --- sense amplifier schematic

M2: Team Paradigm 64x16 dual port SRAM --- sense amplifier layout

M2: Team Paradigm 64x16 dual port SRAM --- precharge circuitry schematic

M2: Team Paradigm 64x16 dual port SRAM --- precharge circuitry layout

M2: Team Paradigm SPICE simulation of 1 bit, 2 words, dual port SRAM

M2: Team Paradigm SPICE simulation of 1 bit, 2 words, dual port SRAM results

M2: Team Paradigm SPICE simulation of 1 bit, 2 words, dual port SRAM results

M2: Team Paradigm 64x16 dual port SRAM --- row decoder schematic

M2: Team Paradigm 64x16 dual port SRAM --- core layout

M2: Team Paradigm Floor plan Proposal rom shift reg reg 4bit 16x1 mux Add rom shift reg Add 4bit 16x1 mux 16bit 4x1 mux reg Add reg Add 16bit 4x1 mux ctrl 500u 200u

M2: Team Paradigm Overall floorplan 1D DCT 16 x 64 SRAM x 600 = 300,000um 2

M2: Team Paradigm Questions ?