Spring 2007EE130 Lecture 36, Slide 1 Lecture #36 ANNOUNCEMENTS Updated information for Term Project was posted on 4/14 Reminder: Coffee Hour today at ~4PM!

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Presentation transcript:

Spring 2007EE130 Lecture 36, Slide 1 Lecture #36 ANNOUNCEMENTS Updated information for Term Project was posted on 4/14 Reminder: Coffee Hour today at ~4PM! OUTLINE The MOSFET: Qualitative theory Long-channel I-V (“Square-Law” Theory) Reading: Textbook Chapter 17.2,

Spring 2007EE130 Lecture 36, Slide 2 Qualitative Theory of the NMOSFET depletion layer The potential barrier to electron flow from the source into the channel is lowered by applying V GS > V T Electrons flow from the source to the drain by drift, when V DS >0. (I DS > 0.) The channel potential varies from V S at the source end to V D at the drain end. (The inversion layer can be modeled as a resistor.) V GS < V T : V GS > V T : V DS  0 V DS > 0

Spring 2007EE130 Lecture 36, Slide 3 When V D is increased to be equal to V G -V T, the inversion-layer charge density at the drain end of the channel equals zero, i.e. the channel becomes “pinched off” As V D is increased above V G -V T, the length  L of the “pinch-off” region increases. The voltage applied across the inversion layer is always V Dsat =V GS -V T, and so the current saturates: If  L is significant compared to L, then I DS will increase slightly with increasing V DS >V Dsat, due to “channel-length modulation” V GS > V T : V DS = V GS -V T V DS > V GS -V T

Spring 2007EE130 Lecture 36, Slide 4 Ideal MOSFET I-V Characteristics Linear region Saturation region (Enhancement Mode NMOS Transistor)

Spring 2007EE130 Lecture 36, Slide 5 Impact of Inversion-Layer Bias When a MOS device is biased into inversion, a pn junction exists between the surface and the bulk. If the inversion layer contacts a heavily doped region of the same type, it is possible to apply a bias to this pn junction. N+ poly-Si p-type Si N SiO 2 V G is biased so that surface is inverted n-type inversion layer is contacted by N+ region If a bias V C is applied to the channel, A reverse bias (V B -V C ) is applied between the channel & body

Spring 2007EE130 Lecture 36, Slide 6 Effect of V CB on  S, W, and V T Application of a reverse body bias  non-equilibrium –2 Fermi levels (one for n-region, one for p-region) separation = qV BC   S is increased by V CB Reverse body bias widens W, increases Q dep  Q inv decreases with increasing V CB, for a given V GB

Spring 2007EE130 Lecture 36, Slide 7 NMOSFET I-V Characteristics V D > V S Current in the channel flows by drift Channel voltage V C (y) varies continuously between the source and the drain Channel inversion charge density W

Spring 2007EE130 Lecture 36, Slide 8 1 st -Order Approximation If we neglect the variation of Q dep with y, then where V T = threshold voltage at the source end:

Spring 2007EE130 Lecture 36, Slide 9 NMOSFET Current (1 st -order approx.) Consider an incremental length dy in the channel. The voltage drop across this region is in the linear region in the saturation region

Spring 2007EE130 Lecture 36, Slide 10 saturation region: Saturation Current, I Dsat