Lab 1 Structure of a PLD Module M1.4 Experiment 1 (p. 40)

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Presentation transcript:

Lab 1 Structure of a PLD Module M1.4 Experiment 1 (p. 40)

TTL Chips

TTL NAND, NOR, XOR

TTL Multiple-input Gates

Experiment 1

Experiment 1 (cont.)

[Out1] [Out0] X Y 9 5 [74x04] 8 6 [DIP switch][74x21] [74x32] A [In4] 2 Z B X !X Y !Y

Experiment 1 (cont.) Logic Analyzer Hardware

Experiment 1 (cont.) PC Printer Port

Experiment 1 (cont.)

Experiment 1 (cont.) LOGIC2

Experiment 1 (cont.) Wire up circuit board Set dip switches to create the following gates: –AND gate –OR gate –XOR gate –NAND gate –NOR gate –XNOR gate

Experiment 1 (cont.) For each gate produce truth table by pressing function key F1 Print truth tables (2 per sheet) by pressing Shift-PrintScreen Label each truth table

Make 6 copies of this figure and show how you connected the jumpers to implement each of the following gates: AND, OR, NAND, NOR, XOR, XNOR

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