EE141 전자회로 1 Chapter 2: Operational Amplifiers 인하대학교 정보통신공학부 2008년 2학기

EE141 Review 3.85V 1.15V 375mA 125mA

EE141 Review 0.33 6.6A

Operational Amplifiers EE141 Operational Amplifiers

2.1 The Ideal OP AMP 2.1.1 The Op-Amp Terminals EE141 2.1 The Ideal OP AMP 2.1.1 The Op-Amp Terminals Figure 2.1 Circuit symbol for the op amp. Figure 2.2 The op amp shown connected to dc power supplies. Op-amp has three terminals: two input and one output terminals Most IC op-amps require two dc power supplies. terminal 4 and 5 connected to a positive voltage VCC and a negative voltage -VEE

2.1.2 Function and Characteristics of the Ideal Op Amp EE141 2.1.2 Function and Characteristics of the Ideal Op Amp Inverting input terminal (V1이 증가하면 Vo가 감소한다) Noninverting input terminal (V2이 증가하면 Vo가 증가한다) Positive power supply Negative power supply Open loop gain A Fig. 2.3 Equivalent circuit of the ideal op amp. Op-amp function: sense the difference between the voltage signals applied at its two input terminals (i.e., the quantity v2-v1), multiply this by a number A, and cause the resulting voltage A(v2-v1) at output terminal 3.

Characteristic of the Ideal Op-Amp EE141 Characteristic of the Ideal Op-Amp Fig. 2.3 Equivalent circuit of the ideal op amp. Infinite input impedance Ideal op-amp is not supposed to draw any input current Zero output impedance The voltage between terminal 3 and ground will always be equal to A(V2-V1)

Characteristic of the Ideal Op-Amp EE141 Characteristic of the Ideal Op-Amp Zero common-mode gain or, equivalently, infinite common-mode rejection Op-amp responds only to the difference signal V2-V1 and hence ignores any signal common to both inputs. i.e., If V1=V2=1V, then the output will be zero. Infinite open-loop gain A Gain A is called the differential gain Infinite bandwidth Ideal op-amp will amplify signals of any frequency with equal gain.

2.1.3 Differential and Common-Mode Signals EE141 2.1.3 Differential and Common-Mode Signals Figure 2.4 Representation of the signal sources v1 and v2 in terms of their differential and common-mode components. Differential input signal Vid Common-mode input signal VIcm

2.2 The Inverting Configuration EE141 2.2 The Inverting Configuration 1)       즉 두 input 차이에 의해서만 증폭되며    이면        어떠한 voltage가 공급되거나       이다. 2) 3) 4) Figure 2.5 The inverting closed-loop configuration.

EE141 Equivalent circuit Figure 2.6 Analysis of the inverting configuration. The circled numbers indicate the order of the analysis steps.

만약 Vo 가 어느 일정한 값을 가지면 Vx=V2-V1=Vo/A = 0 , EE141 만약 Vo 가 어느 일정한 값을 가지면 Vx=V2-V1=Vo/A = 0 , That is, because the gain A approaches infinity, V1 = V2 Virtual short circuit means that whatever voltage is at 2 will automatically appear at 1 because of the infinite gain A Virtual Ground: Terminal 2 is connected to ground; thus V2=0 and V1=0. 터미널 1을 Virtual ground 되었다고 말한다. See pp. 69. 만약      가 어느 일정한 값을 가지면       , 그러나       이므로 전류는 흐르지 않는다.  이를 Virtual Ground(Virtual Short Circuit)  라고 부른다. G : closed-loop gain Vo = - R2/R1 VI

2.2.2 Effect of Finite Open-Loop Gain EE141 Figure 2.7 Analysis of the inverting configuration taking into account the finite open-loop gain of the op amp. 2) 만약       이면       See pp. 71 Closed-loop gain Percentage error

Example 2.1 See pp. 72 Percentage error Figure 2.7 Analysis of the inverting configuration taking into account the finite open-loop gain of the op amp. Percentage error 2.1)  R1 = 1 ㏀ ,  R2 = 100 ㏀ A I G I VI V0 V0/A 103 90.83 -9.17% 0.1 90.83 0.0908 104 99.00 -1.00% 0.1 99.00 0.0999 105 99.90 -0.10% 0.1 99.90 0.0999

2.2.3 Input and Output Resistances EE141 2.2.3 Input and Output Resistances To avoid the loss of signal strength, voltage amplifier are required to have high input resistance. (Section 1.5) Fan-out을 크게 하기 위하여       를 크게 하면       도 비현실적으로 크게 하여야 한다.  최고 10 ㏁ 이상이면 전류가 너무 적고 현실적이지 못하다. => Solution: Example 2.2

Example 2.2: pp. 73 EE141 Figure 2.8 Circuit for Example 2.2. The circled numbers indicate the sequence of the steps in the analysis. Virtual ground 개념을 사용하면    (  R1=1㏁ , R2=1㏁ , R4=1㏁ , R3=10.2㏀ 이면 = -100 이 된다. )

2.2.4 An important Application - The Weighted Summer EE141 2.2.4 An important Application - The Weighted Summer See pp. 76 Figure 2.10 A weighted summer. 만약         이면

2.3 Noninverting Configuration EE141 2.3 Noninverting Configuration Fig. 2.12 The noninverting configuration. Figure 2.13 Analysis of the noninverting circuit. The sequence of the steps in the analysis is indicated by the circled numbers.

Voltage Follower Unity-gain amplifier (or Voltage follower) EE141 Voltage Follower Fig. 2.14 (a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model. Unity-gain amplifier (or Voltage follower) R2=0 and R1= VO=VI, Rin=  , Rout=0

2.4 Difference Amplifiers EE141 Figure 2.16 A difference amplifier. 만약 이면

EE141 Figure 2.17 Application of superposition to the analysis of the circuit of Fig. 2.16.

EE141 Figure 2.18 Analysis of the difference amplifier to determine its common-mode gain Acm ; vO / vIcm.

EE141 Fig. 2.19 Finding the input resistance of the difference amplifier for the case R3 = R1 and R4 = R2.

EE141 2.5 Effect of Finite Open-loop Gain and Bandwidth on Circuit Performance Consider some of the important nonideal properties of the op-amp. Frequency Dependence of the Open-Loop Gain Figure 2.22 Open-loop gain of a typical general-purpose internally compensated op amp. The differential open-loop gain of an op-amp is finite and decreases with frequency. Although the gain is quite high at dc and low frequencies, it starts to fall off at a rather low frequency (10 Hz in Fig. 2.22) Uniform -20-dB/decade gain rolloff is typical of internally compensated op-amps.

EE141 2.5 Effect of Finite Open-loop Gain and Bandwidth on Circuit Performance Figure 2.22 Open-loop gain of a typical general-purpose internally compensated op amp. unit gain bandwidth

2.5.2 Frequency Response of Closed-Loop Amplifiers EE141 2.5.2 Frequency Response of Closed-Loop Amplifiers Inverting amplifier From Eq. (2.5) Figure 2.23 Frequency response of an amplifier with a nominal gain of +10 V/V.

EE141 Noninverting From Eq. 2.11 dc gain = 1+R2/R1

2.6 Large-Signal Operation of Op-Amps EE141 2.6 Large-Signal Operation of Op-Amps Study the limitations on the performance of op-amp circuits when large output signals are present. Output Voltage Saturation Power supply가 ±15V 시 output voltage 가 ±13V에서 saturate 되면  ±13V를 rated output voltage 라고 부른다. Figure 2.25 (a) A noninverting amplifier with a nominal gain of 10 V/V designed using an op amp that saturates at ±13-V output voltage and has ±20-mA output current limits. (b) When the input sine wave has a peak of 1.5 V, the output is clipped off at ±13 V.

EE141 Slew Rate Slew rate limiting: specific maximum rate of change possible at the output of a real op-amp => Slew Rate (SR) Figure 2.26 (a) Unity-gain follower. (b) Input step waveform. (c) Linearly rising output waveform obtained when the amplifier is slew-rate limited. (d) Exponentially rising output waveform obtained when V is sufficiently small so that the initial slope (vtV) is smaller than or equal to SR.

EE141 2.6.4 Full-Power Bandwidth Op-amp slew-rate limiting can cause nonlinear distortion in sinusoidal waveforms 만약 이면 output waveform이 Distorted된다. Figure 2.27 Effect of slew-rate limiting on output sinusoidal waveforms.

Exercise 2.22 fM : full-power bandwidth in op-amps data book EE141 fM : full-power bandwidth in op-amps data book - slew-rate limiting에 기인하여 Op-amp의 rated output voltage와 같은 amplitude를 가지고 있는 output sinusoid가 distortion을 보여주기 시작할 때의 주파수 At a frequency  higher than M, the maximum amplitude of the undistorted output sinusoid Exercise 2.22 Rated output voltage = 10v, SR= 1V/us 만약 이면

2.7 DC Imperfections Offset Voltage VOS (Offset Voltage) EE141 2.7 DC Imperfections Offset Voltage VOS (Offset Voltage)          : Output을 zero로 만들기 위한 input voltage         : 내부소자의 불균형에 의해서 발생하며 온도에 따라 변화한다. VOS : generally-purpose op amp 에서 Vos는 1 ~ 5mV Op-amp data sheets specify typical and maximum values of Vos at room temperature as well as the temperature coefficient of Vos (usually in Output dc voltage Figure 2.28 Circuit model for an op amp with input offset voltage VOS. Figure 2.29 Evaluating the output dc offset voltage due to VOS in a closed-loop amplifier.

Capacitively coupled amplifier EE141 Capacitively coupled amplifier Figure 2.31 (a) A capacitively coupled inverting amplifier, and (b) the equivalent circuit for determining its dc output offset voltage VO. 가 DC이므로 Signal이 low frequency 인 경우 사용불가

Input Bias and Offset Currents EE141 Input Bias and Offset Currents Figure 2.32 The op-amp input bias currents represented by two current sources IB1 and IB2.  (Input Bias Current)  :   input이 zero일 때 흐르는 input전류                                    (Input Offset Current) : input이 zero일 때 흐르는 input전류의 차이                                 

EE141 Figure 2.33 Analysis of the closed-loop amplifier, taking into account the input bias currents. Figure 2.34 Reducing the effect of the input bias currents by introducing a resistor R3. 식(1)에 식(2)를 대입하면,

2.8 Integrators and Differentiators EE141 2.8 Integrators and Differentiators 1) The Inverting Integrator Figure 2.39 (a) The Miller or inverting integrator. (b) Frequency response of the integrator. Frequency 특성

2) The Op Amp Differentiator EE141 2) The Op Amp Differentiator Figure 2.44 (a) A differentiator. (b) Frequency response of a differentiator with a time-constant CR. Frequency 특성