FAILURE ANALYSIS ELECTRICAL CHARACTERIZATION SCHOOL OF MICROELECTRONICS KUKUM

Introduction A general approach is recommended for failure analysis electrical testing that will help the failure analyst to electrically characterize the device under analysis (DUA) without causing additional damage that may obscure or obliterate the original cause of failure.

Introduction Failure Analysis is performed on a device to determine the root cause of the failure.If, during the analysis electrical testing causes damage to the device or alters the device’s failure mechanism, then wrong conclusions will be made concerning the root cause of failure.

Introduction The initial electrical verification process provides a general understanding of how the device is failing electrically (eg. datalog, measured continuity, parametric, functional outputs of the device from production test equipment).

Example Electrical leakage identified -> detailed I-V characterization on a curve tracer or parametric analyzer. Functional failures -> Schmoo plotting (characterization as a function of temperature, power supply voltage or freq.) or scan testing

BEFORE ALL ELSE UPON FAILURE & FA FLOW DOCUMENTATION ==>ELECTRICALLY CHARACTERISE DEVICE BENCH TESTS!

BENCH TESTING process of characterizing the failure mode of the sample using various bench equipment for exciting the device and measuring its responses NDT

WHAT TO LOOK FOR? Electrical Testing = detecting shorts, = opens, = parametric shifts / changes in resistance, = abnormal electrical behavior on the die, between the die and the interconnects, between the interconnects and the circuit card, within the circuit card, and among the various connections between circuit cards.

DO IT RIGHT! Correct electrical testing -provides the failure mode (catastrophic, functional, parametric, programming or timing), -identify the failure site.

ASSUMPTIONS During FA- test has to be performed on the assumption that the device is not the same as a standard or “normal” device. –The device may have been electrically overstressed. –The device may have been damaged by ESD (electrostatic discharge). –The device may be altered internally due to chemical reactions. –The device may have been misassembled. –The device may include a manufacturing defect.

TOOLS FOR ELECTRICAL CHARACTERIZATION Multimeters, Freq. counters, OSC, Manual curve tracer, Computer controlled curve tracer Semiconductor parametric analyzer TDR, ATE etc…

MULTIMETERS Basic tests - electrical connection, short, open --general localization of fault area ==>IFF => PRIOR KNOWLEDGE

FREQ. CNTR. & OSC. A STEP HIGHER / DEEPER -TIMING RELATIONS -FREQ. RESPONSES DIFFERENT f’s

V-I CHARACTERISTICS Curve tracing - current-voltage characteristics of an electrical path using a curve tracer - identify electrical failures that exhibit abnormal V-I relationships between pins - 2pt probe objective of curve tracing = open or shorted pins & pins with abnormal I/V characteristics (excessive leakage, abnormal breakdown voltages, etc.). FA focused on circuits with anomalous pins.

Dynamic curve tracing, unit powered, while curve tracing, if static curve tracing does not reveal any anomalies Curve tracing can also be done on an electrical path inside the die circuitry itself, where the nodes defining the electrical path are not connected to any external pins. ==>Microprobing - achieve electrical contact with the selected nodes, with the probe needles also attached to the curve tracer.

CURVE TRACER Curve tracing = easiest, safest, fastest and most reliable way to gather electrical characteristics information of DUT Curve tracer - visual nature easy to spot certain categories of errors (opens, shorts, leakages, etc...) including problems that might not be obvious from a series of single point measurements- CT =continuous

CURVE TRACER Continuous "sweep" - possible to plot the reaction of DUT for entire range of conditions. Curve tracer - store trace information, operate at low voltage and current levels - allows detection of certain electrical failure mechanisms that would be hidden by the higher voltage and/or current levels generally associated with verification testing.

CURVE TRACER

-graphical representation of electrical characteristics on screen. -common configuration- apply voltage to DUT pin (series resistor~1  ) and measure the resulting voltage and current. -sweeping applied voltage & displaying current versus voltage plot

CURVE TRACER Y axis = current & X axis = voltage. Values on axis increase with distance from the origin Two extreme conditions: –a vertical line crossing origin = short (no voltage measured on the pin), –a flat horizontal line crossing origin = open (no current through the pin).

fundamentally… Standard behaviours - V & I –Resistors –Diodes –Transistors –Zener diodes –combinations –etc.

I V

I V

I V

I V

TDR Old principle BUT new application Good for BGA / high pin count packages uses electron speed / reflection - pinpoint exact point / layer of defect TDR instrument = very wide BW equivalent sampling oscilloscope ( Ghz) with an internal step generator. =connected to DUT via cables, probes and fixtures

TDR Due to wide BW of the oscilloscope, and to ensure that this BW and fast rise time can be delivered to the DUT, -must use high-quality cables, probes, and fixtures, ==>these cables, probes and fixtures can significantly degrade the rise time of the instrument, reduce the resolution, and decrease the impedance measurement accuracy. ==>In a TDR probe, both a signal and a ground contact are normally required during the measurement.

t t T=2t d = T/v v

TDR impedance profile analysis -observe open fault occurred, but also to determine the exact location of the fault in time. -If velocity of propagation in the given segment is known, then the physical location of the fault can be determined easily. -velocity of propagation - determined using a reference device with known physical length.

open fault = occurred shortly after the package-to-die bondwire connection

Computer controlled CT - Overcomes the limitations of the manual curve tracer for high pin count devices and has become standard tool for I/O electrical characterization -Controls the application of the stimulus to each pin and records the measured data for display or comparison to previously stored data

SPA For characterization diodes, transistors, performing circuit level parametric testing which includes DC functional testing of analog circuits such as voltage references, regulators, and op- amps Can measure very low levels of current and voltages

ATE Used in production For characterization -> high pin count devices & timing complexity Provides a software toolkit for debug tools available are wave, vector or pattern, and schmoo tools