Intelligent Storage Systems Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Intelligent Storage Systems Chapter 4 ISMDR:BE5IT:VIII:Madhu N. PIIT

Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Chapter objective After completing this chapter, you will be able to: Describe components of intelligent storage system List benefits of intelligent storage system Explain intelligent cache algorithms and protection Describe intelligent storage array implementation High-end storage array Mid-range storage array ISMDR:BE5IT:VIII:Madhu N. PIIT

What is an Intelligent Storage System Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. What is an Intelligent Storage System Intelligent Storage Systems are RAID arrays that are: Highly optimized for I/O processing Have large amounts of cache for improving I/O performance Have operating environments that provide: Intelligence for managing cache Array resource allocation Connectivity for heterogeneous hosts Advanced array based local and remote replication options ISMDR:BE5IT:VIII:Madhu N. PIIT

Benefits of an Intelligent Storage System Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Benefits of an Intelligent Storage System Intelligent storage system provides several benefits over a collection of disks in an array (JBOD) or even a RAID arrays: Increased capacity Improved performance Easier data management Improved data availability and protection Enhanced Business Continuity support Improved security and access control ISMDR:BE5IT:VIII:Madhu N. PIIT

Components of an Intelligent Storage System Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Components of an Intelligent Storage System Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN ISMDR:BE5IT:VIII:Madhu N. PIIT

Intelligent Storage System: Front End Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Intelligent Storage System: Front End Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN Ports Controllers ISMDR:BE5IT:VIII:Madhu N. PIIT

Front End Command Queuing Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Front End Command Queuing A D C B A D C B A C D I/O Requests I/O Processing B Order Front-End Cylinders Controller Without Optimization (FIFO) A D C B A D B C A D I/O Requests I/O Processing C B Order Front-End Cylinders Controller With command queuing ISMDR:BE5IT:VIII:Madhu N. PIIT

Intelligent Storage System: Cache Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Intelligent Storage System: Cache Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN ISMDR:BE5IT:VIII:Madhu N. PIIT

Write Operation with Cache Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Write Operation with Cache Write-through Cache Cache Write Request Acknowledgement Write-back Cache Write Request Acknowledgement Acknowledgement ISMDR:BE5IT:VIII:Madhu N. PIIT

Read Operation with Cache: ‘Hits’ and ‘Misses’ Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Read Operation with Cache: ‘Hits’ and ‘Misses’ Data found in cache = ‘Hit’ Cache Read Request No data found = ‘Miss’ Cache Read Request ISMDR:BE5IT:VIII:Madhu N. PIIT

Cache Management: Algorithms Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Cache Management: Algorithms Least Recently Used (LRU) Discards least recently used data Most Recently Used (MRU) Discards most recently used data ( assumed that recent data may not be required for a while) New Data Oldest Data Cache Implementation Dedicated Cache Separate memory sets reserved for read and write Global Cache Both read and write operation use available memory. More efficient ISMDR:BE5IT:VIII:Madhu N. PIIT

Cache Management: Watermarking Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Cache Management: Watermarking Manage peak I/O requests “bursts” through flushing/de-staging Idle flushing, High Watermark flushing and Forced flushing For maximum performance: Provide headroom in write cache for I/O bursts 100 % HWM LWM Idle flushing High watermark flushing Forced flushing ISMDR:BE5IT:VIII:Madhu N. PIIT

Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Cache Data Protection Protecting cache data against failure: (power failure) Cache mirroring Each write to the cache is held in two different memory locations on two independent memory cards Cache coherency(only writes r mirrored) Cache vaulting Cache is exposed to the risk of uncommitted data loss due to power failure In the event of power failure, uncommitted data is dumped to a dedicated set of drives called vault drives ISMDR:BE5IT:VIII:Madhu N. PIIT

Intelligent Storage System: Back End Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Intelligent Storage System: Back End Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN Controllers Ports ISMDR:BE5IT:VIII:Madhu N. PIIT

Intelligent Storage System: Physical Disks Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Intelligent Storage System: Physical Disks Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN ISMDR:BE5IT:VIII:Madhu N. PIIT

What the Host Sees – RAID Sets and LUNs (Logical Unit Number) Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. What the Host Sees – RAID Sets and LUNs (Logical Unit Number) Host 1 Intelligent Storage System Front End Back End Physical Disks LUN 0 Cache Connectivity LUN 0 FC SAN LUN 1 LUN 1 Host 2 ISMDR:BE5IT:VIII:Madhu N. PIIT

Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. LUN Masking It is a process that provides data access control by defining which LUNs a host can access. LUN masking is access control mechanism Process of masking LUNs from unauthorized access Implemented on storage arrays and at front end controller Intelligent Storage Arrays High End Storage System Mid Range Storage System ISMDR:BE5IT:VIII:Madhu N. PIIT

ISS Implementation: High-end Storage Systems Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. ISS Implementation: High-end Storage Systems Also referred as Active-active arrays I/O’s are serviced through all the available path Following are high-end array capabilities: Large storage capacity Huge cache to service host I/Os Fault tolerance architecture Multiple front-end ports and support to interface protocols High scalability Ability to handle large amounts of concurrent I/Os Designed for large enterprises Active-Active Configuration Controller A Port Active LUN Controller B Port Active Host Storage Array ISMDR:BE5IT:VIII:Madhu N. PIIT

Midrange Storage Systems Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Midrange Storage Systems Also referred as Active-passive arrays Host can perform I/Os to LUNs only through active paths Other paths remain passive till active path fails Midrange array have two controllers, each with cache, RAID controllers and disks drive interfaces Designed for small and medium enterprises Less scalable as compared to high-end array Active-Passive Configuration Controller A Port Active LUN Controller Port B Passive Host Storage Array ISMDR:BE5IT:VIII:Madhu N. PIIT

Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Chapter Summary Key points covered in this chapter: Intelligent Storage Systems features Components of Intelligent Storage Systems Cache management algorithms Intelligent Storage System implementation High-end storage array Mid range storage array ISMDR:BE5IT:VIII:Madhu N. PIIT

Concept in Practice: EMC CLARiiON CX-4 Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Concept in Practice: EMC CLARiiON CX-4 Support for UltraFlex technology Scalable from up to 960 disks Supports flash drives Supports different types and sizes of drives, and RAID types (0, 1, 1+0, 3, 5, 6) Supports up to 16 GB of available cache memory per controller (Storage Processor) Enhances availability with non disruptive upgrade and failover Ensures data protection through mirrored write cache and cache vaulting Supports storage-based local and remote data replication Through SnapView and MirrorView software ISMDR:BE5IT:VIII:Madhu N. PIIT

CLARiiON CX-4 Architecture Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. CLARiiON CX-4 Architecture CPU Memory CPU Module Multi-Core Processors FC Module I/O Complex iSCSI Module 4 Gb/s Fibre Channel Back-End CLARiiON Messaging Interface (CMI) Multi-Lane PCI-Express Bridge Link Power Supply SPS Fan 4 Gb/s LCC 4 Gb/s Fibre Channel Front-End Storage Processor ISMDR:BE5IT:VIII:Madhu N. PIIT

Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. EMC Symmetrix DMX-4 Incrementally scalable to 2,400 disks Supports Flash-based solid-state drives Dynamic global cache memory (16 GB–512 GB) Advanced processing power (up to 130 PowerPC) Direct matrix Architecture High data processing bandwidth (up to 128 GB/s) Data protection with RAID 1, 1+0 (also known as 10 for mainframe), 5, and 6 Storage-based local and remote replication Through TimeFinder and SRDF software ISMDR:BE5IT:VIII:Madhu N. PIIT

Direct Matrix Architecture Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Direct Matrix Architecture ESCON host attach Fibre Channel host attach FICON, GigE, iSCSI host attach FICON, GigE, iSCSI host attach FICON, GigE, iSCSI host attach FICON, GigE, iSCSI host attach Fibre Channel host attach ESCON host attach ESCON Director FC Director Multi-Protocol CD Multi-Protocol CD Multi-Protocol CD Multi-Protocol CD FC Director ESCON Director Cntl Cntl Cntl Cntl Cntl Cntl Cntl Cntl Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Direct Matrix Control and communications Signals Environmental control and status signals 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory Environmental control and status signals Control and communications Signals FC (Back-End) Direct Matrix Direct Matrix FC (Back-End) Direct Matrix Direct Matrix FC (BE or FE) Direct Matrix Direct Matrix FC (BE or FE) Direct Matrix Direct Matrix FC (BE or FE) Direct Matrix Direct Matrix FC (BE or FE) Direct Matrix Direct Matrix FC (Back-End) Direct Matrix Direct Matrix FC (Back-End) Direct Matrix Direct Matrix Cntl Cntl Cntl Cntl Cntl Cntl Cntl Cntl A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B Symmetrix Fibre Channel disk devices Symmetrix Fibre Channel disk devices Fibre Channel back-end director * Fibre Channel back-end director * Fibre Channel back-end director * Fibre Channel back-end director * Symmetrix Fibre Channel disk devices Symmetrix Fibre Channel disk devices Power supplies Battery backup Unit Modules Cooling Service Processor Modem UPS ISMDR:BE5IT:VIII:Madhu N. PIIT

Copyright © 2009 EMC Corporation. Do not Copy - All Rights Reserved. Check Your Knowledge  What are the parts of an Intelligent Storage System? What are the differences between a high-end and midrange storage array? What is the difference between a read cache hit and a read cache miss? What is the difference between Least Recently Used and Most Recently Used algorithms? What is the difference between Write-through and Write-back cache? ISMDR:BE5IT:VIII:Madhu N. PIIT