1 HARDWARE / SOFTWARE PARTITIONING Devang Sachdev Lizheng Zhang

HW SW ECE 734 Project Presentation2 Motivation Hardware – Software Codesign (HSC) –Most efficient implementation of a system –Unified H-S integration –Higher confidence in the systems functionality –Lower costs and smaller development cycles Hardware – Software Partitioning –Definition: The process of deciding, for each subsystem, whether the required functionality is more advantageously implemented in hardware or software –Fundamental phase of HSC

HW SW ECE 734 Project Presentation3 Basics Goal: To achieve a partition that will give us the required performance within the overall system requirements (in performance, area, power, cost etc.) Approach –Software – oriented partitioning: Start with all functionality in software and move portions into hardware which are time-critical and can not be allocated to software –Hardware – oriented partitioning: Start with all functionality in hardware and move portions into software implementation

HW SW ECE 734 Project Presentation4 Design Methodology MATLAB C languageC + VHDLVHDL Functional verification SW HW

SW ECE 734 Project Presentation5 Target Architecture Processor FPGA Local Memory Shared Memory Global Memory

HW SW ECE 734 Project Presentation6 Test Application Discrete Cosine Transform (DCT) –Computationally intensive block in JPEG –Equation

HW SW ECE 734 Project Presentation7 Design Issue – Truncation Error Decide bits needed to represent data –Cosine coefficients [-0.5,+0.5] s.xxxxx –Data path length [-4096,+4095] sxxx_xxxx_xxxx JPEG files compression

HW SW ECE 734 Project Presentation8 Cosine Coefficients

HW SW ECE 734 Project Presentation9 Computation Data Length

HW SW ECE 734 Project Presentation10 DCT Partitioning for v=1:8 for u=1:8 sum2(u,v)=0; for n=1:8 sum1(n,u) = 0; for m=1:8 x1 = f(m,n)*dctcos(m,u); sum1(n,u)= sum1(n,u)+ x1; end y1 = sum1(n,u)*dctcos(n,v); sum2(u,v)= sum2(u,v)+y1; end

HW SW ECE 734 Project Presentation11 Thank You