Power Electronics Lecture-7 Unijunction Transistor & Programmable Unijunction Transistor Dr. Imtiaz Hussain Assistant Professor email: imtiaz.hussain@faculty.muet.edu.pk URL :http://imtiazhussainkalwar.weebly.com/

Unijunction Transistor (UJT) UJT is another solid state three terminal device that can be used in gate pulse, timing circuits and trigger generator applications to switch and control thyristors and triacs for AC power control applications.

Unijunction Transistor (UJT) Equivalent Circuit: UJT’s have unidirectional conductivity and negative impedance characteristics acting more like a variable voltage divider during breakdown

Unijunction Transistor (UJT) As the physical position of the p-n junction is closer to terminal B2 than B1 the resistive value of RB2will be less than RB1. These two series resistances produce a voltage divider network between the two base terminals of the Unijunction transistor Since this channel stretches from B2 to B1, when a voltage is applied across the device, the potential at any point along the channel will be in proportion to its position between terminals B2 and B1. The level of the voltage gradient therefore depends upon the amount of supply voltage.

Unijunction Transistor (UJT) When used in a circuit, terminal B1 is connected to ground and the Emitter serves as the input to the device.  Suppose a voltage VBB is applied across the UJT between B2 and B1 so that B2 is biased positive relative to B1. With zero Emitter input applied, the voltage developed across RB1 (the lower resistance) of the resistive voltage divider can be calculated as: 𝑉 𝑅𝐵1 = 𝑅 𝐵1 𝑅 𝐵1 + 𝑅 𝐵2 𝑉 𝐵𝐵

Unijunction Transistor (UJT) For a Unijunction transistor, the resistive ratio of RB1 to RBB is called the intrinsic stand-off ratio (η). 𝜂= 𝑅 𝐵1 𝑅 𝐵1 + 𝑅 𝐵2 Typical standard values of η range from 0.5 to 0.8 for most common UJT’s.

Unijunction Transistor (UJT) If a small positive input voltage (less than the voltage developed across resistance RB1 is now applied to the Emitter input terminal, the diode p-n junction is reverse biased, thus offering a very high impedance and the device does not conduct. The UJT is switched “OFF” and zero current flows. However, when the Emitter input voltage is increased and becomes greater than VRB1 (or ηVBB + 0.7V, where 0.7V equals the p-n junction diode volt drop) the p-n junction becomes forward biased and the Unijunction transistor begins to conduct. The result is that Emitter current, ηIE now flows from the Emitter into the Base region.

UJT Characteristics

UJT Characteristics

Example-1 The intrinsic stand-off ratio for a UJT is determined to be 0.6. If the inter-base resistance (RBB) is 10kΩ what are the values of RB1 and RB2? Solution Intrinsic stand-off ratio for a UJT is given as 𝜂= 𝑅 𝐵1 𝑅 𝐵1 + 𝑅 𝐵2 0.6= 𝑅 𝐵1 10𝐾 𝑅 𝐵1 =6𝐾Ω

Example-1 Inter-base resistance (RBB) is 10kΩ 𝑅 𝐵𝐵 = 𝑅 𝐵1 + 𝑅 𝐵2 10𝐾=6𝐾+ 𝑅 𝐵2 𝑅 𝐵2 =4𝐾Ω

Example-2 A UJT has 10V between the bases. If the intrinsic stand off ratio is 0.65, find the value of stand off voltage. What will be the peak point voltage if the forward voltage drop in the pn junction is .7V? Solution VBB=10V, 𝜂=0.65, 𝑉 𝐷 =0.7𝑉 Stand off voltage (VRB1) is given as 𝑉 𝑅𝐵1 =𝜂 𝑉 𝐵𝐵 𝑉 𝑅𝐵1 =0.65×10 𝑉 𝑅𝐵1 =6.5𝑉

Example-2 Solution VBB=10V, 𝜂=0.65, 𝑉 𝐷 =0.7𝑉 Peak point Voltage (VP) is given as 𝑉 𝑃 =𝜂 𝑉 𝐵𝐵 + 𝑉 𝐷 𝑉 𝑃 =6.5+0.7 𝑉 𝑃 =7.2𝑉

Exercise-1 Determine the minimum and maximum peak-point voltage for UJT with VBB=24V. Given that UJT has a range of 𝜂=0.74 𝑡𝑜 0.86.

UJT Applications The most common application of a Unijunction transistor is as a triggering device for SCR’s and Triacs  Other UJT applications include sawtoothed generators, simple oscillators, phase control, and timing circuits. The simplest of all UJT circuits is the Relaxation Oscillator producing non-sinusoidal waveforms.

UJT Relaxation Oscillator In a basic and typical UJT relaxation oscillator circuit, the Emitter terminal of the Unijunction transistor is connected to the junction of a series connected resistor and capacitor.

UJT Relaxation Oscillator 𝑉 𝐶 = 𝑉 𝐵𝐵 (1− 𝑒 −𝑡/ 𝑅 3 𝐶 )

UJT Relaxation Oscillator 𝑉 𝐶 = 𝑉 𝐵𝐵 (1− 𝑒 −𝑡/ 𝑅 3 𝐶 ) Discharge of the capacitor occurs when VC =Vp. 𝑉 𝑃 = 𝑉 𝐵𝐵 (1− 𝑒 −𝑡/ 𝑅 3 𝐶 ) 𝜂 𝑉 𝐵𝐵 = 𝑉 𝐵𝐵 (1− 𝑒 −𝑡/ 𝑅 3 𝐶 ) Note: VD is ignored in above equation 1−𝜂= 𝑒 −𝑡/ 𝑅 3 𝐶 ln (1−𝜂) =− 𝑡 𝑅 3 𝐶 𝑅 3 𝐶 ln ( 1 1−𝜂 ) =𝑡

Example-3 The data sheet for a 2N2646 Unijunction Transistor gives the intrinsic stand-off ratio η as 0.65. If a 100nF capacitor is used to generate the timing pulses, calculate the timing resistor required to produce an oscillation frequency of 100Hz.

Example-3 The timing period is given as: 𝑇= 1 100 =10𝑚𝑠 The value of the timing resistor, R3 is calculated as: 𝑅 3 𝐶 ln ( 1 1−𝜂 ) =𝑡 𝑅 3 = 10𝑚 𝐶 ln ( 1 1−𝜂 ) 𝑅 3 =95.23𝐾Ω

UJT Motor Speed Control Circuit

Example-4 Consider the UJT relaxation oscillator shown in figure. Assume that UJT has following characteristics. Find V P Output Frequency 𝑓 Prove that a 10 𝐾Ω 𝑅 𝐸 is within acceptable range i.e 𝑅 𝐸𝑚𝑖𝑛 <𝑅 𝐸 <𝑅 𝐸𝑚𝑎𝑥 𝜂=0.63 𝑉 𝑣 =1.5 𝑉c 𝑅 𝐵𝐵 =9.2 𝐾Ω 𝑅 𝐵1 =5.8 𝐾Ω 𝑅 𝐵2 =3.4 𝐾Ω 𝐼 𝑃 =5𝜇𝐴 𝐼 𝑉 =3.5 𝑚𝐴Ω

Example-4 Solution V P 𝑉 𝑝 =𝜂 𝑉 𝑏𝑏 +0.7 𝑉 𝑝 =0.65×22.6+0.7 𝑉 𝑏𝑏 = 𝑅 𝐵𝐵 𝑅 1 + 𝑅 1 + 𝑅 𝐵𝐵 𝑉 𝑠 𝑉 𝑏𝑏 =22.6 𝑉 𝑉 𝑝 =0.65×22.6+0.7 𝑉 𝑝 =15.39 𝑉

Example-4 Solution Output Frequency 𝑓 𝐹= 1 𝑅 𝐸 𝐶 𝐸 ln 1 1−𝜂 𝐹=476 𝐻𝑧

Example-4 Solution Prove that a 10 𝐾Ω 𝑅 𝐸 is within acceptable range i.e 𝑅 𝐸𝑚𝑖𝑛 <𝑅 𝐸 <𝑅 𝐸𝑚𝑎𝑥 𝑅 𝐸𝑚𝑎𝑥 = 𝑉 𝑠 − 𝑉 𝑝 𝐼 𝑃 = 24−15.39 5𝜇 =1.7𝑀Ω 𝑅 𝐸𝑚𝑖𝑛 = 𝑉 𝑠 − 𝑉 𝑉 𝐼 𝑉 = 24−1.5 3.5𝑚 =6.4 𝐾Ω

Line-Synchronized UJT Trigger Circuit for SCR

Line-Synchronized UJT Trigger Circuit for SCR

Programmable Unijunction Transistor (PUT) It is called a UJT just because its characteristics and parameters have much similarity to that of the unijunction transistor. It is called programmable because the parameters like intrinsic standoff ratio (η), peak voltage(Vp) etc can be programmed with the help of two external resistors. 

PUT Characteristics PUT characteristics is essentially a plot between the anode voltage Va and anode current Ia of the PUT. Typically the anode of the PUT is connected to a positive voltage and the cathode is connected to the ground. The gate is connected to the junction of the two external resistor R1 and R2 which forms a voltage divider network. It is the value of these two resistors that determines the intrinsic standoff ratio(η) and peak voltage (Vp) of the PUT.

PUT Characteristics When the anode to cathode voltage (Va)is increased the anode current will also ncrease and the  junction behaves like a typical P-N junction. But the Va cannot be increased beyond a particular point. At this point sufficient number of charges are injected and the junction starts to saturate. Beyond this point the anode current (Ia) increases and the anode voltage (Va) decreases.

PUT Characteristics Beyond this point the anode current (Ia) increases and the anode voltage (Va) decreases. This is equal to a negative resistance scenario and this negative resistance region in the PUT characteristic is used in relaxation oscillators. When the anode voltage (Va) is reduced to a particular level called “Valley Point”, the device becomes fully saturated and no more decrease in Va is possible. There after the device behaves like a fully saturated P-N junction.

PUT Characteristics Intrinsic standoff ratio ( η) : Intrinsic standoff ratio of a PUT is the ratio of the external resistor R1 to the sum of R1 and R2.   It helps us to predict how much voltage will be dropped across the gate and cathode for a given Vbb. The intrinsic standoff ratio can be expressed using the equation: 𝜂= 𝑅 1 𝑅 1 + 𝑅 2

PUT Characteristics Peak voltage (Vp): It is the anode to cathode voltage after which the PUT jumps into the negative resistance region. The peak voltage Vp will be usually one diode drop (0.7V) plus the gate to cathode voltage (Vg). Peak voltage can be expressed using the equation: 𝑉 𝑝 = 𝑉 𝑔 +0.7 𝑉 𝑝 = 𝑉 𝑅1 +0.7 𝑉 𝑝 =𝜂 𝑉 𝑏𝑏 +0.7

PUT Relaxation Oscillator Resistors R1 and R2 set the peak voltage (Vp) and intrinsic standoff ratio (η) of the PUT. Resistor Rk limits cathode current of the PUT. Resistor R and capacitor C sets the frequency of the oscillator. 

PUT Relaxation Oscillator When the voltage across the capacitor exceeds the peak voltage (Vp) the PUT goes into negative resistance mode and this creates a low resistance path from anode(A) to cathode(K). When the voltage across the capacitor is below valley point voltage (Vv) the PUT reverts to its initial condition. The capacitor starts to charge again and the cycle is repeated. This series of charging and discharging results in a sawtooth waveform across the capacitor as shown in the figure below. 𝐹= 1 𝑅𝐶 ln 1 1−𝜂

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