1 EEL 4783: HDL in Digital System Design Lecture 6: Verilog Examples Prof. Mingjie Lin
2 Shift Register
3 SR with Parallel Loads
4 Barrel SR
5 Barrel SR
6 Universal RF
7 Bi-Directional Bus
8
9 When a FF is created?
10 Sync. Data Swapping
11 Sync. Data Swapping
12 Sync. Data Swapping
13 S
14 S
15 S
16 S
17 S
18 Final issues Please fill out the student info sheet before leaving Come by my office hours (right after class) Any questions or concerns?