COE 308 Term Dr Abdelhafid Bouhraoua Term Dr Abdelhafid Bouhraoua

Instructor Office Hours:Sat. Mon. Wed. 9: :00 AM Office Location:Bldg 22 Office Phone:2178 Web page:

Syllabus

Course Objectives To introduce students to the techniques used to enhance the performance of computer architecture including memory hierarchy, pipelining, and parallelism,To introduce students to the techniques used to enhance the performance of computer architecture including memory hierarchy, pipelining, and parallelism, To introduce students to the trade-off analysis in the design of various aspects of Computer Architecture including Instruction Set Design, Memory Hierarchy, Instruction Level Pipeline, and MultiprocessingTo introduce students to the trade-off analysis in the design of various aspects of Computer Architecture including Instruction Set Design, Memory Hierarchy, Instruction Level Pipeline, and Multiprocessing

Course Outcome (1) Discuss how various architectural enhancements and instructions sets have evolved and their effects on system performance.Discuss how various architectural enhancements and instructions sets have evolved and their effects on system performance. Understand the design of arithmetic units and their impact on overall performance.Understand the design of arithmetic units and their impact on overall performance. Explain the effect of memory latency and bandwidth on performance.Explain the effect of memory latency and bandwidth on performance. Explain the use of memory hierarchy to reduce the effective memory latency, and understand the design tradeoffs in hierarchical memories and its impact on performance.Explain the use of memory hierarchy to reduce the effective memory latency, and understand the design tradeoffs in hierarchical memories and its impact on performance. Describe the principles of memory management.Describe the principles of memory management.

Course Outcome (2) Discuss how pipelining and parallelism can be applied to the design of scalar and superscalar processors, and can perform speed-up analysis.Discuss how pipelining and parallelism can be applied to the design of scalar and superscalar processors, and can perform speed-up analysis. Be able to identify the problems and hazards that arise in pipelined processors and identify their corresponding solutions.Be able to identify the problems and hazards that arise in pipelined processors and identify their corresponding solutions. Appreciate the problems caused by cache coherency in shared and distributed memories and understand the ways in which the problem can be overcomeAppreciate the problems caused by cache coherency in shared and distributed memories and understand the ways in which the problem can be overcome Describe the limitations imposed by interconnections and memory on multiprocessing systems, and understand design tradeoffsDescribe the limitations imposed by interconnections and memory on multiprocessing systems, and understand design tradeoffs

Textbook Computer Organization & Design – The Hardware/Software Interface David A. Patterson and John L. Hennessy, Third Edition, Morgan Kaufmann, 2005

Exams and Assignments 5-6 Written Assignments 4-5Quizzes 2Major Exams 1Final Exam

Grading Policy (1) Quizzes and Assignments 20 % Project 15 % Major Exam 1 20 % Major Exam 2 20 % Final Exam 25 % Lowest 2, 3 or 4 marks of the quizzes and assignments dropped

Grading Policy (2) Assignments are to be submitted in class or by in the specified due date.Assignments are to be submitted in class or by in the specified due date. Late assignments will be accepted for five days after the due date and be penalized 10% per each late dayLate assignments will be accepted for five days after the due date and be penalized 10% per each late day

Lecture Breakdown Introduction and Performance 1.5 week Computer Arithmetic 2 weeks MIPS Instruction Set 1 week Datapath and Control 2 weeks Pipeline Design Techniques 3 weeks Memory System Design 3 weeks I/O and Buses 1 week Multiprocessors 2 weeks

Ethics (1) All assignments are individual and ONLY individual work will be accepted.All assignments are individual and ONLY individual work will be accepted. Detected copies of assignments (written or programming assignments) will result in ZEROS for the whole group (including the student who actually solved the problem)Detected copies of assignments (written or programming assignments) will result in ZEROS for the whole group (including the student who actually solved the problem)

Ethics (2) Using unauthorized information or notes on an examination, peeking at others work, or altering a graded exam to claim more grades are severe violations of academic honesty.Using unauthorized information or notes on an examination, peeking at others work, or altering a graded exam to claim more grades are severe violations of academic honesty. Remember that if you CHEAT, you are cheating no one but yourself.Remember that if you CHEAT, you are cheating no one but yourself. Detected situations will result in failing grades in the course, and depending on the severity of the situation, some cases may possibly end up in SUSPENSION from the university.Detected situations will result in failing grades in the course, and depending on the severity of the situation, some cases may possibly end up in SUSPENSION from the university.