Parallel Video Compression System For Satellites Performed by: Dmitry Sezganov, Vitaly Spector Instructor: Stas Lapchev, Artyom Borzin In Cooperation.

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Presentation transcript:

Parallel Video Compression System For Satellites Performed by: Dmitry Sezganov, Vitaly Spector Instructor: Stas Lapchev, Artyom Borzin In Cooperation with:

Abstract  Military satellites gather information – Photography.  Higher resolution means more details – info worth more.  Solution – lossless image compression: JPEG2000 algorithm.  Continuous input DataStream – Real time compression. Project Purpose: Design and implementation of prototype compression system for satellite images.

System JPEG2000Compression System System Extractor Transmitter Receiver Our Project Satellite Earth Station

System Input DataStream 8 km/s 2.5km  The rate for one sensor only.  There are many sensors. 16,000 lines/s 4pix/m² X 2.5km X 8km/s = 80Mpixel/s 5000pix Input pixel data rate: 12 bit/pix X 80Mpixel/s ≈ 1Gbit/s Input bit rate: The system input data rate - Multi Gbit rates!

Main Idea  Single chip solution for narrow region Real Time Compression.  Parallel Compression – n must be minimal. N 5000/n5000 pixels5000/n 16,000 lines/sec

1 Sensor Array Block Diagram DividerMerger Compression Unit System Input DataStream Compressed data Stream Parallel Compression Unit

System Architecture  Testing Module – simulates high bit rate camera.  Channel#1 – COMM; Channel#2 – Rocket IO;  Initialize the Generator with a picture.  The Generator sends the picture periodically. Channel #1 Channel #2 Testing Module Compression Module Testing Unit Raw stream Coded stream Coded stream and controls

System Block

PC Module 1.Create raw file 2.Send source raw file to Testing Module 3.Receive coded image stream. 4.Process compressed data and extract jp2 stream 5.Decode and Verify jp2 files (viewer)  Configure programmable logic  Download 2 PowerPC405 programs  Load compression device firmware

System Block

Virtex2Pro Overview Features of Virtex2Pro:  IBM PowerPC processor  8 Multi-Gigabit transceivers Gbps (Rocket IO)  Many programmable logic  On-chip Memory resources

Testing Module Purpose of Testing Module:  Get source raw file  High speed data Generation to Compression Module.  Receive compressed data from Compression Module.  Return compressed data to PC.

Testing Board (Embedded System #1) PPC405 Processor Block Rocket I/O Transceiver TX RX 16 PLB Arbiter RAM Controller PLB PLB2OPB Bridge OPB Arbiter OPB LCD Controller GPIO Controller UART LITE Stream Generator Receiver 1Gbps

System Block

Compression Module Purpose:  Compression Controller Board  Codec Board Consists of 2 part:  Gets 1Gbps data stream from Testing Module.  Parallel Processing and Compressing data in real time.  Return compressed data to Testing Board.

Compression Controller Board (Embedded System #2) PPC405 Processor Block Rocket I/O Transceiver TX RX 16 PLB Arbiter Codec Controller Module (CCM) PLB PLB2OPB Bridge OPB Arbiter OPB LCD Controller GPIO Controller UART LITE To Codec Board 1Gbps

Codec Board

ADV202 Overview Features of ADV202:  Single-Chip JPEG2000 Codec cheap Solution.  Real time compression of 48Mpix/s (1-component).  Programmable Tile/Image Size.  Flexible pixel interface supporting 8, 10, 12, 14, 16-bit Y, Cr, Cb pixels.  Supports various interfaces (also DMA).

Image Tiling N=2 Tile width Tile height Tile #2Tile #3 Tile #0Tile #1 To ADV202_0To ADV202_1

Ethernet Test Environment RIO Compressed Data Receiver Parallel Compression Unit Input Raw Data Stream Compressed Data Stream S.U.T High Speed Camera Emulator Earth StationSatellite Computerized verification RIO  4 Parameters: (1)High bit-rate, (2)Real Time, (3)Lossless compression, (4)High Compression Ratio.