Computing with Finite Automata (part 2) 290N: The Unknown Component Problem Lecture 10.

Slides:



Advertisements
Similar presentations
Hybrid BDD and All-SAT Method for Model Checking Orna Grumberg Joint work with Assaf Schuster and Avi Yadgar Technion – Israel Institute of Technology.
Advertisements

Representing Boolean Functions for Symbolic Model Checking Supratik Chakraborty IIT Bombay.
Lecture 21 State minimization via implication charts.
Lexical Analysis IV : NFA to DFA DFA Minimization
CSE 311 Foundations of Computing I
Outline Node minimization dcmin complete combinational behavior? using latch_expose FSM “Windowing”
CS357 Lecture: BDD basics David Dill 1. 2 BDDs (Boolean/binary decision diagrams) BDDs are a very successful representation for Boolean functions. A BDD.
CSE 311: Foundations of Computing Fall 2013 Lecture 23: Finite state machines and minimization.
1 1 CDT314 FABER Formal Languages, Automata and Models of Computation Lecture 3 School of Innovation, Design and Engineering Mälardalen University 2012.
1 EE5900 Advanced Embedded System For Smart Infrastructure Static Scheduling.
Determinization of Büchi Automata
CS 267: Automated Verification Lecture 10: Nested Depth First Search, Counter- Example Generation Revisited, Bit-State Hashing, On-The-Fly Model Checking.
Introduction to Computability Theory
Languages. A Language is set of finite length strings on the symbol set i.e. a subset of (a b c a c d f g g g) At this point, we don’t care how the language.
61 Nondeterminism and Nodeterministic Automata. 62 The computational machine models that we learned in the class are deterministic in the sense that the.
Subset Construction 290N: The Unknown Component Problem Lecture 13.
Penn ESE 535 Spring DeHon 1 ESE535: Electronic Design Automation Day 22: April 23, 2008 FSM Equivalence Checking.
Reachability Analysis 290N: The Unknown Component Problem Lecture 14.
Computing with Finite Automata 290N: The Unknown Component Problem Lecture 9.
Aho-Corasick String Matching An Efficient String Matching.
Reachability Analysis using AIGs (instead of BDDs?) 290N: The Unknown Component Problem Lecture 23.
Computation Engines: BDDs and SAT (part 2) 290N: The Unknown Component Problem Lecture 8.
ECE Synthesis & Verification - L211 ECE 697B (667) Spring 2006 Synthesis and Verification of Digital Systems Verification Equivalence checking.
Languages. A Language is set of finite length strings on the symbol set i.e. a subset of (a b c a c d f g g g) At this point, we don’t care how the language.
ECE Synthesis & Verification - Lecture 10 1 ECE 697B (667) Spring 2006 ECE 697B (667) Spring 2006 Synthesis and Verification of Digital Systems Binary.
ECE 667 Synthesis & Verification - BDD 1 ECE 667 ECE 667 Synthesis and Verification of Digital Systems Binary Decision Diagrams (BDD)
Foundations of Reachability Analysis EECS 290A Sequential Logic Synthesis and Verification Lecture 1.
CSCI 3301 Transparency No. 9-1 Chapter #9: Finite State Machine Optimization Contemporary Logic Design.
1 CSC 6001 VLSI CAD (Physical Design) January
Non-Deterministic Space is Closed Under Complementation Neil Immerman Richard Szelepcsenyi Presented By: Subhajit Dasgupta.
State Minimization and Determinization EECS 290A Sequential Logic Synthesis and Verification.
CSE 311: Foundations of Computing Fall 2014 Lecture 23: State Minimization, NFAs.
Zvi Kohavi and Niraj K. Jha 1 Capabilities, Minimization, and Transformation of Sequential Machines.
Lexical Analysis — Part II: Constructing a Scanner from Regular Expressions Copyright 2003, Keith D. Cooper, Ken Kennedy & Linda Torczon, all rights reserved.
Lexical Analysis — Part II: Constructing a Scanner from Regular Expressions.
An ordered n-tuple is a set of n objects with an order associated with them. If n objects are represented by x 1, x 2,..., x n, then we write the ordered.
1 © 2015 B. Wilkinson Modification date: January 1, 2015 Designing combinational circuits Logic circuits whose outputs are dependent upon the values placed.
CSE 311 Foundations of Computing I Lecture 21 Finite State Machines Autumn 2011 CSE 3111.
CSE 311 Foundations of Computing I Lecture 21 Finite State Machines Spring
Lexical Analysis Constructing a Scanner from Regular Expressions.
CALTECH CS137 Spring DeHon CS137: Electronic Design Automation Day 9: May 6, 2002 FSM Equivalence Checking.
Week 10Complexity of Algorithms1 Hard Computational Problems Some computational problems are hard Despite a numerous attempts we do not know any efficient.
Lexical Analysis III : NFA to DFA DFA Minimization Lecture 5 CS 4318/5331 Spring 2010 Apan Qasem Texas State University *some slides adopted from Cooper.
CSCI 115 Chapter 8 Topics in Graph Theory. CSCI 115 §8.1 Graphs.
1 Verification of FSM Equivalence Goal: Verify that two sequential circuit implementations always produce the same sequence of outputs given the same sequence.
COSC 2007 Data Structures II
Strings Basic data type in computational biology A string is an ordered succession of characters or symbols from a finite set called an alphabet Sequence.
UNIT - I Formal Language and Regular Expressions: Languages Definition regular expressions Regular sets identity rules. Finite Automata: DFA NFA NFA with.
To Split or to Conjoin: The Question in Image Computation 1 {mooni, University of Colorado at Boulder 2 Synopsys.
Pushdown Automata Chapter 12. Recognizing Context-Free Languages Two notions of recognition: (1) Say yes or no, just like with FSMs (2) Say yes or no,
CS412/413 Introduction to Compilers Radu Rugina Lecture 3: Finite Automata 25 Jan 02.
June 13, 2016 Prof. Abdelaziz Khamis 1 Chapter 2 Scanning – Part 2.
Capabilities, Minimization, and Transformation of Sequential Machines
P & NP.
Sequential Flexibility
Copyright © Cengage Learning. All rights reserved.
Instructor: Rajeev Alur
CSE 311 Foundations of Computing I
Two issues in lexical analysis
Chapter 2 FINITE AUTOMATA.
A Boolean Paradigm in Multi-Valued Logic Synthesis
Lexical Analysis — Part II: Constructing a Scanner from Regular Expressions Copyright 2003, Keith D. Cooper, Ken Kennedy & Linda Torczon, all rights reserved.
CSE 311 Foundations of Computing I
Enumerating Distances Using Spanners of Bounded Degree
THEORY OF COMPUTATION Lecture One: Automata Theory Automata Theory.
Lexical Analysis — Part II: Constructing a Scanner from Regular Expressions Copyright 2003, Keith D. Cooper, Ken Kennedy & Linda Torczon, all rights reserved.
CSE 311: Foundations of Computing
Lexical Analysis — Part II: Constructing a Scanner from Regular Expressions Copyright 2003, Keith D. Cooper, Ken Kennedy & Linda Torczon, all rights reserved.
Discrete Controller Synthesis
Minimize # states in a DFSM
Presentation transcript:

Computing with Finite Automata (part 2) 290N: The Unknown Component Problem Lecture 10

Outline  Reachability analysis  Product computation (“product”)  Verification by language containment (“check”)  Determinization by subset construction (“determinize”)  Don’t-care minimization (“dcmin”)

Image Computation  Given a mapping of minterms from one Boolean space (input space) into another Boolean space (output space) For a set of minterms in the input space For a set of minterms in the input space The image of this set is the set of corresponding minterms in the output spaceThe image of this set is the set of corresponding minterms in the output space For a set of minterms in the output space For a set of minterms in the output space The pre-image of this set is the set of corresponding minterms in the input spaceThe pre-image of this set is the set of corresponding minterms in the input space Input space Output space Image Pre-image

Implicit Image Computation  Implements formula: Image(Y) =  x [R(X,Y) & C(X)]  Implicit methods by far outperform explicit ones Successfully computing images with more than 2^100 minterms in the input/output spaces Successfully computing images with more than 2^100 minterms in the input/output spaces  Operations & and  are basic Boolean manipulations They are efficiently implemented in the BDD package They are efficiently implemented in the BDD package  To avoid large intermediate results (during and after the product computation), operation AND-EXIST can be used, which performs product and quantification simultaneously (in one pass over the BDDs)

Improvements to Image Computation  Represent the transition relation as a set of partitions Natural when the FSM (automaton) is represented by the circuit Natural when the FSM (automaton) is represented by the circuit  Different approaches to computing the image (Coudert, 1989) Input splitting Input splitting Output splitting Output splitting Quantification scheduling Quantification scheduling  Hybrid methods Use partition clustering in addition to quantification scheduling (Berkeley, IWLS 95) Use partition clustering in addition to quantification scheduling (Berkeley, IWLS 95) Use non-linear quantification scheduling (CMU, ICCAD 01) Use non-linear quantification scheduling (CMU, ICCAD 01) Partitioning (OR-decomposition) of the transition relation Partitioning (OR-decomposition) of the transition relation “To split, or to conjoin” (mix the quantification scheduling and input/output splitting) (Somenzi, DAC 2000) “To split, or to conjoin” (mix the quantification scheduling and input/output splitting) (Somenzi, DAC 2000) “The far side of image computation” (Somenzi, ICCAD 2003) “The far side of image computation” (Somenzi, ICCAD 2003)  Tricks and speed-ups Disjoint decomposition Disjoint decomposition Caching of intermediate results, etc Caching of intermediate results, etc

Reachability Analysis  Many applications explore the reachable state space  Given an FSM (automaton) with the transition relation, find all the states reachable from the initial state  Apply image computation repeatedly to compute the sets of reachable states in the next iteration (“onion rings”) until convergence ReachedStates = InitialState; while ( there are new states ) ReachedStatesNew = Image( TransitionRelation, ReachedStates ); if (ReachedStatesNew = ReachedStates ) stop; ReachedStates = ReachedStatesNew ;  Reachability analysis uses sophisticated methods of image computation  Relies on numerous improvements Simplification using don’t-cares Simplification using don’t-cares Iterative squaring Iterative squaring Approximations, etc Approximations, etc

Outline  Reachability analysis  Product computation (“product”)  Verification by language containment (“check”)  Determinization by subset construction (“determinize”)  Don’t-care minimization (“dcmin”)

Product Computation  Starting from the initial states, run two automata “in parallel” and create a new automaton (product automaton) whose states are labeled by the pairs of states: one state from each automaton A state of the product is accepting iff both component states are accepting A state of the product is accepting iff both component states are accepting  The maximum number of states in the product automaton is equal to the product of the number of states of the argument However, many of these states may not be reachable from the initial state However, many of these states may not be reachable from the initial state

Explicit Algorithm  The two automata The linked lists of states {s} and {t} The linked lists of states {s} and {t} The accepting states are marked The accepting states are marked  Additional data structures Q: The FIFO queue of reached product states Q: The FIFO queue of reached product states H: The hash table hashing two component states into the product state H: The hash table hashing two component states into the product state  Initialization Create the initial state of the product automaton (s0,t0) by putting together the initial states of the argument automata, s0 and t0 Create the initial state of the product automaton (s0,t0) by putting together the initial states of the argument automata, s0 and t0 insert this state into Q and H insert this state into Q and H  Computation while Q is not empty, extract one product state (s,t) from Q for all product states (s’,t’) reachable in one transition from (s,t) for all product states (s’,t’) reachable in one transition from (s,t) if (s’,t’) is not in H (that is, (s’,t’) has not been visited) if (s’,t’) is not in H (that is, (s’,t’) has not been visited) create the new product state (s’,t’) create the new product state (s’,t’) insert (s’,t’) into Q and into H insert (s’,t’) into Q and into H else find (s’,t’) using the hash table H else find (s’,t’) using the hash table H add the transition from (s,t) into (s’,t’) add the transition from (s,t) into (s’,t’)

Example of Product

Verification by Language Containment  Works for deterministic, complete automata  Create the product of two automata, S and T  While visiting product states, keep track of the acceptance attribute of the component states Case 1: If we reach product state (s,t), in which s  S is accepting while t  T is non-accepting, the language of T cannot contain the language of S Case 1: If we reach product state (s,t), in which s  S is accepting while t  T is non-accepting, the language of T cannot contain the language of S Case 2: A symmetric case applies when the language of S cannot contain the language of T Case 2: A symmetric case applies when the language of S cannot contain the language of T If we encounter both Case 1 and Case 2, there is no language containment among S and T If we encounter both Case 1 and Case 2, there is no language containment among S and T Can terminate the product computation immediatelyCan terminate the product computation immediately If we do not encounter either Case 1 or Case 2, the languages accepted by S and T are identical If we do not encounter either Case 1 or Case 2, the languages accepted by S and T are identical Need to complete the product computation to prove thisNeed to complete the product computation to prove this

Example of Language Containment Check

Determinization by Subset Construction  Assume that ND transitions in the ND automaton happen at the same time It means that, at any moment, the ND automaton is in a subset of its states It means that, at any moment, the ND automaton is in a subset of its states The subset may contain more than one state The subset may contain more than one state  The point of determinization is to enumerate through all the subsets of states reachable from the initial state under any possible inputs Each subset of states of the ND automaton becomes a single state of the new deterministic automaton Each subset of states of the ND automaton becomes a single state of the new deterministic automaton The languages accepted by the ND automaton and its determinized version are the same The languages accepted by the ND automaton and its determinized version are the same

Determinization Algorithm  The automaton The linked lists of states {s}, with the accepting states marked The linked lists of states {s}, with the accepting states marked  Additional data structures Q: The FIFO queue of reached subsets of states Sk Q: The FIFO queue of reached subsets of states Sk H: The hash table mapping each reached subsets of states Sk into the corresponding state of the determinized automaton H: The hash table mapping each reached subsets of states Sk into the corresponding state of the determinized automaton  Initialization Create the initial state of the determinized automaton by creating the subset of states {s0} composed of the initial state of the ND automaton Create the initial state of the determinized automaton by creating the subset of states {s0} composed of the initial state of the ND automaton insert {s0} into Q and H insert {s0} into Q and H  Computation while Q is not empty, extract one subset of states Si from Q for all subsets of states Sj reachable in one transition from Si for all subsets of states Sj reachable in one transition from Si if Sj is not in H (that is, Sj has not been visited) if Sj is not in H (that is, Sj has not been visited) create the new state of the determinized automaton create the new state of the determinized automaton make the new state accepting if some state of Sj is accepting make the new state accepting if some state of Sj is accepting insert Sj into Q and into H insert Sj into Q and into H else find the new state corresponding to Sj using the hash table H else find the new state corresponding to Sj using the hash table H add the transition from Si into Sj add the transition from Si into Sj

Example of Determinization Regular expression: 0*100*1(00*1)*

Computing Reachable Subsets  Given a subset of states, what are other subsets of states that can be reached in one transition from the given subset?  Naïve explicit approach (using STG) Enumerate the minterms of the Boolean space of conditions Enumerate the minterms of the Boolean space of conditions For each minterm, find the subset of states reachable from the given subset in one iteration For each minterm, find the subset of states reachable from the given subset in one iteration Collect unique subsets Collect unique subsets  Better explicit approach (using STG) Compute partitioning on the condition space defined by all the states from the given subset Compute partitioning on the condition space defined by all the states from the given subset Start by considering the partition defined by one state and gradually refine it by adding other statesStart by considering the partition defined by one state and gradually refine it by adding other states Each partition corresponds to one subset of next states Each partition corresponds to one subset of next states Collect unique subsets Collect unique subsets This approach does not require enumerating through the minterms This approach does not require enumerating through the minterms

Computing Reachable Subsets (continued)  Implicit approach (using the monolithic relation) Restrict the monolithic transition relation Ri(x,cs,ns) to the given subset of states Si(cs): Ri(x,s) =  cs [Ri(x,cs,ns) & Si(cs)] ns  s Restrict the monolithic transition relation Ri(x,cs,ns) to the given subset of states Si(cs): Ri(x,s) =  cs [Ri(x,cs,ns) & Si(cs)] ns  s Given a state subset Si and its transition relation Ri(x,s), while Ri(x,s) is not empty, enumerate through reachable subsets: Given a state subset Si and its transition relation Ri(x,s), while Ri(x,s) is not empty, enumerate through reachable subsets: Extract one minterm m(x,s) from Ri(x,s)Extract one minterm m(x,s) from Ri(x,s) Restrict m(x,s) to only input variables x (call it m(x))Restrict m(x,s) to only input variables x (call it m(x)) Find Sj reachable from Si under m(x): Sj(s) =  x[Ri(x,s) & m(x)]Find Sj reachable from Si under m(x): Sj(s) =  x[Ri(x,s) & m(x)] Find Cij(x) labeling transition Si  Sj: Cij(x)=  s[Ri(x,s)  Sj(s)]Find Cij(x) labeling transition Si  Sj: Cij(x)=  s[Ri(x,s)  Sj(s)] Subtract this transition from Ri(x,s): Ri(x,s) = Ri(x,s) & NOT(Cij(x))Subtract this transition from Ri(x,s): Ri(x,s) = Ri(x,s) & NOT(Cij(x))  Hybrid approach (using state transition relations) Pre-compute BDDs of the transition relations for each state Pre-compute BDDs of the transition relations for each state Given a state subset Si and its transition relation Ri(x,s), while Ri(x,s) is not empty, proceed as described above… Given a state subset Si and its transition relation Ri(x,s), while Ri(x,s) is not empty, proceed as described above…

Don’t-Care Minimization  State minimization of pseudo-non-deterministic FSMs is a complex problem NP-complete, solved exactly for small FSMs only NP-complete, solved exactly for small FSMs only  A fast heuristic minimization is possible (“dcmin”) Requires an accepting don’t-care state to be present Requires an accepting don’t-care state to be present It is the case for most solutions to language equationsIt is the case for most solutions to language equations  Computation Complete with non-accepting state (if not complete) Complete with non-accepting state (if not complete) Define the don’t-care condition of each state to be the condition of its transition into the accepting DC state Define the don’t-care condition of each state to be the condition of its transition into the accepting DC state Create the incompatibility graph Create the incompatibility graph One vertex for each stateOne vertex for each state An edge exists between the two vertices if the care conditions of the two states do not overlapAn edge exists between the two vertices if the care conditions of the two states do not overlap Color the incompatibility graph Color the incompatibility graph Collapse the states, which have the same color Collapse the states, which have the same color

Example