DAC 2001: Paper 18.2 Center for Embedded Computer Systems, UC Irvine Center for Embedded Computer Systems University of California, Irvine Speculation Techniques for High Level Synthesis of Control Intensive Designs Sumit Gupta Nikil Dutt Nick Savoiu Rajesh Gupta Sunwoo Kim Alex Nicolau SPARK High Level Synthesis System Supported by Semiconductor Research Corporation

2 Center for Embedded Computer Systems, UC Irvine Speculative Code Motions for Improved Synthesis Results  The Problem: u Quality of results of HLS strongly affected by the input behavioral specification  The Need: u High level and compiler transformations that optimize the quality of synthesis results  Our Focus: u Code motions beyond conditionals and loops  Approach: u Use speculation to increase scope of code motions

3 Center for Embedded Computer Systems, UC Irvine Scheduling with Given Resource Allocation Resource Constraints +<

4 Center for Embedded Computer Systems, UC Irvine Extracting Parallelism with Speculation

5 Center for Embedded Computer Systems, UC Irvine Reverse Speculation  Moves operations into conditionals  Only moves to branches which require result  Moves operations with lower priority

6 Center for Embedded Computer Systems, UC Irvine Early Condition Execution  Evaluates conditions ASAP  Moves all unscheduled operations into conditionals  Uses reverse speculation to achieve this

7 Center for Embedded Computer Systems, UC Irvine Spark Synthesis Framework  Experiments performed using two benchmarks:  ADPCM Encode and MPEG-1 Prediction Block

8 Center for Embedded Computer Systems, UC Irvine Effects of Speculative Code Motions on Example Designs

9 Center for Embedded Computer Systems, UC Irvine Synthesis Results using Synopsys Design Compiler  Considerable reduction in total Delay of Circuit  Critical Path Length remains fairly constant u Increasing Steering Logic u Decreasing size of controller  Area Increases due to increased steering logic and registers u Can be reduced by Resource Binding [ISSS 01]

10 Center for Embedded Computer Systems, UC Irvine Conclusions  Comparative study of various code motions u Evaluation based on F Performance and Size of Controller F Synthesis Results u Reduced schedule lengths consistently obtained by F Across hierarchical conditional block code motions F Speculation and Early Condition Execution  Average of u 35 % improvement in size of controller and performance of design u % reduction in total delay of circuit

11 Center for Embedded Computer Systems, UC Irvine Recent Related Work  Code motions in the presence of conditionals u Condition Vector List Scheduling [Wakabayashi 89] F Condition vectors to improve resource sharing among mutually exclusive operations u Symbolic Scheduling [Radivojevic 96] F Exact symbolic formulation which explores all possible solutions u WaveSched Scheduler [Lakshminarayana 98] F Minimizes expected number of cycles by speculation u Basic Block Control Graph Scheduling [Santos 99] F Supports generalized code motions