COE 308: Computer Architecture (T041) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (Appendix A, Computer Architecture: A Quantitative Approach,

Slides:



Advertisements
Similar presentations
Arithmetic in Computers Chapter 4 Arithmetic in Computers2 Outline Data representation integers Unsigned integers Signed integers Floating-points.
Advertisements

Computer Engineering FloatingPoint page 1 Floating Point Number system corresponding to the decimal notation 1,837 * 10 significand exponent A great number.
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3: IT Students.
Basic Integer Arithmetic Building Block
Floating Point Numbers
CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (2)
Computer ArchitectureFall 2007 © September 5, 2007 Karem Sakallah CS 447 – Computer Architecture.
Booth’s Algorithm.
Assembly Language and Computer Architecture Using C++ and Java
Assembly Language and Computer Architecture Using C++ and Java
COE 308: Computer Architecture (T032) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (cont.) (Appendix A, Computer Architecture: A Quantitative.
Computer ArchitectureFall 2008 © August 25, CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (1)
DIGITAL SYSTEMS TCE1111 Representation and Arithmetic Operations with Signed Numbers Week 6 and 7 (Lecture 1 of 2)
Computer ArchitectureFall 2007 © August 29, 2007 Karem Sakallah CS 447 – Computer Architecture.
Computer ArchitectureFall 2008 © August 27, CS 447 – Computer Architecture Lecture 4 Computer Arithmetic (2)
Dr. Bernard Chen Ph.D. University of Central Arkansas
1 Arithmetic and Logical Operations - Part II. Unsigned Numbers Addition in unsigned numbers is the same regardless of the base. Given a pair of bit sequences.
Data Representation – Binary Numbers
Computer Organization and Architecture Computer Arithmetic Chapter 9.
Computer Arithmetic Nizamettin AYDIN
Computer Arithmetic. Instruction Formats Layout of bits in an instruction Includes opcode Includes (implicit or explicit) operand(s) Usually more than.
Computer Arithmetic.
Chapter 6: Computer Arithmetic and the ALU
Computer Architecture ALU Design : Division and Floating Point
ECE232: Hardware Organization and Design
S. Rawat I.I.T. Kanpur. Floating-point representation IEEE numbers are stored using a kind of scientific notation. ± mantissa * 2 exponent We can represent.
07/19/2005 Arithmetic / Logic Unit – ALU Design Presentation F CSE : Introduction to Computer Architecture Slides by Gojko Babić.
CH09 Computer Arithmetic  CPU combines of ALU and Control Unit, this chapter discusses ALU The Arithmetic and Logic Unit (ALU) Number Systems Integer.
Oct. 18, 2007SYSC 2001* - Fall SYSC2001-Ch9.ppt1 See Stallings Chapter 9 Computer Arithmetic.
CSE 241 Computer Organization Lecture # 9 Ch. 4 Computer Arithmetic Dr. Tamer Samy Gaafar Dept. of Computer & Systems Engineering.
Multiplication of signed-operands
Figure 1.1 Block diagram of a digital computer. Functional Units.
Computer Arithmetic and the Arithmetic Unit Lesson 2 - Ioan Despi.
Fixed and Floating Point Numbers Lesson 3 Ioan Despi.
CSC 221 Computer Organization and Assembly Language
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Computer Arithmetic See Stallings Chapter 9 Sep 10, 2009
Computer Engineering FloatingPoint page 1 Floating Point Number system corresponding to the decimal notation 1,837 * 10 significand exponent A great number.
COE 308: Computer Architecture (T032) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (Appendix A, Computer Architecture: A Quantitative Approach,
Dr Mohamed Menacer College of Computer Science and Engineering Taibah University CE-321: Computer.
Number Representation and Arithmetic Circuits
COMPUTER ARITHMETIC Arithmetic with Signed-2's Complement Numbers
Integer Operations Computer Organization and Assembly Language: Module 5.
MicroProcessors Lec. 4 Dr. Tamer Samy Gaafar. Course Web Page —
S 2/e C D A Computer Systems Design and Architecture Second Edition© 2004 Prentice Hall Chapter 6 Overview Number Systems and Radix Conversion Fixed point.
Cosc 2150: Computer Organization Chapter 9, Part 3 Floating point numbers.
Computer Arithmetic. Integer Representation Sign-magnitude representation ’s complement representation magnitudes
Chapter 9 Computer Arithmetic
William Stallings Computer Organization and Architecture 8th Edition
COMPUTER ARITHMETIC Arithmetic with Signed-2's Complement Numbers
William Stallings Computer Organization and Architecture 7th Edition
ECEG-3202 Computer Architecture and Organization
Computer Architecture
Chapter 8 Computer Arithmetic
Presentation transcript:

COE 308: Computer Architecture (T041) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (Appendix A, Computer Architecture: A Quantitative Approach, J. Hennessy & D. Patterson, 1 st Edition, 1990)

COE 308 (T041) – Dr. Marwan Abu-Amara 2 Basic Techniques of Integer Arithmetic Ripple-Carry Addition:  Half Adder: Takes 2 inputs a i & b i and produces a sum bit, s i, and a carry bit, c i+1, as output Mathematicallys i = (a i + b i ) mod 2 c i+1 =  (a i + b i ) / 2  Logically c i+1 = a i b i

COE 308 (T041) – Dr. Marwan Abu-Amara 3 Basic Techniques of Integer Arithmetic (cont.) Ripple-Carry Addition:  Full Adder: Takes 3 inputs a i, b i, & c i and produces a sum bit, s i, and a carry bit, c i+1, as output Logically c i+1 = a i b i + a i c i + b i c i  Problem in building an n-bit adder is propagating the carries  Ripple-carry adder uses n full adders to build an n-bit adder  Delay of c i+1 is 2 levels of logic  2n logic levels in an n-bit adder (i.e. O(n) to generate final result)  Can use n-bit adder to get A–B by feeding A into “A” input & inverse of B into “B” input, and set c 0 to 1

COE 308 (T041) – Dr. Marwan Abu-Amara 4 Basic Techniques of Integer Arithmetic (cont.)

COE 308 (T041) – Dr. Marwan Abu-Amara 5 Radix-2 Multiplication & Division Multiplication: 2 unsigned numbers, A & B (a n-1 a n-2 … a 1 a 0 & b n-1 b n-2 … b 1 b 0 ). Register P (i.e. product) is initially set to 0. Algorithm: Repeat n times 1. If least significant bit of A is 1  P = P + B Otherwise  P = P Shift the register pair P & A to right by 1 bit such that low- order bit of P is moved into A’s high-order bit, and low-order bit of A is shifted out  Final result is in the register pair P & A with P having the high order bits

COE 308 (T041) – Dr. Marwan Abu-Amara 6 Radix-2 Multiplication & Division “Restoring” Division: 2 unsigned numbers, A & B (a n-1 a n-2 … a 1 a 0 & b n-1 b n-2 … b 1 b 0 ). Register P is initially set to 0. Algorithm: Repeat n times 1. Shift register pair P & A one bit left (with high-order bit of A moved into P’s low-order bit) 2. Subtract B from P (i.e. P = P – B) 3. If result of step 2 < 0 (i.e. (–)ve)  Set low-order bit of A to 0 Otherwise  Set low-order bit of A to 1 4. If result of step 2 < 0 (i.e. (–)ve)  P = P + B  Final result: A = quotient, P = remainder

COE 308 (T041) – Dr. Marwan Abu-Amara 7 Radix-2 Multiplication & Division

COE 308 (T041) – Dr. Marwan Abu-Amara 8 Example of Division Divide 14 by 3  A = 14 = & B = 3 = Iteration Step P A Iteration Step P A. Initial _ _ (add B to P) (add B to P) _  Quotient = A = = Remainder = P = _ = (add B to P)

COE 308 (T041) – Dr. Marwan Abu-Amara 9 Radix-2 Multiplication & Division Non-Restoring Division: 2 unsigned numbers, A & B (a n-1 a n-2 … a 1 a 0 & b n-1 b n-2 … b 1 b 0 ). Register P is initially set to 0. Algorithm: Repeat n times If P is (–)ve: 1. Shift register pair P & A one bit left 2. P = P + B Else (i.e. If P is not (–)ve): 1. Shift register pair P & A one bit left 2. P = P – B If P is (–)ve  Set low-order bit of A to 0 Otherwise  Set low-order bit of A to 1  Final result: A = quotient, P = remainder

COE 308 (T041) – Dr. Marwan Abu-Amara 10 Signed Numbers 4 methods: 1. Sign magnitude 2. 1’s complement 3. 2’s complement(most widely used) 4. Biased: A fixed bias is picked so that sum of bias & # represented is always > 0 (used in floating-point) Example: Represent –3 in (1) sign magnitude, (2) 1’s complement, (3) 2’s complement 3 =  (1) sign magnitude: – =  (2) 1’s complement:  (3) 2’s complement:1101 2

COE 308 (T041) – Dr. Marwan Abu-Amara 11 Signed Numbers (cont.) Overflow in unsigned #s: when there’s a carry-out of MSB Overflow in 2’s complement: when carry-in to MSB is different from carry-out of MSB Example: –5 + (–7)  10  different 1011(–5)  overflow (–7) (–7)  00  same 0101(+5)  no overflow (–7) 1110

COE 308 (T041) – Dr. Marwan Abu-Amara 12 Radix-2 Multiplication & Division Signed Numbers Multiplication: To perform 2’s complement multiplication, use same algorithm as before but with the following modifications: 1. At the i th multiply step, LSB of A is a i, and: for 1 st step (i.e. when i = 0), take a i-1 to be 0 2. Shift P arithmetically (i.e. copy sign bit) 1 bit to right If a i =& a i-1 =then 00Add 0 to P 01Add B to P 10Sub B from P 11Add 0 to P

COE 308 (T041) – Dr. Marwan Abu-Amara 13 Example 1 of Multiplication Multiply -6 by -5  A = -6 = a 3 a 2 a 1 a 0 = & B = -5 = Iteration Step P A a i B B B  Product = P & A = +30

COE 308 (T041) – Dr. Marwan Abu-Amara 14 Example 2 of Multiplication Multiply -6 by +5  A = -6 = a 3 a 2 a 1 a 0 = & B = +5 = Iteration Step P A a i B B B  Product = P & A = -30

COE 308 (T041) – Dr. Marwan Abu-Amara 15 Floating Point A floating-point number (FP #) is divided into 2 parts: 1. Exponent 2. Significand (or Mantissa) FP # = significand  base exponent (e.g. exponent = -2 & significand = 1.5  FP # = 1.5  2 -2 = 0.375) Single-precision # is represented using 32 bits: 1 for sign 8 for exponent 23 for fraction Exponent is a signed # represented using the bias method with a bias of 127 Significand = Mantissa = 1 + fraction Thus, if e = value of exponent field, and f = value of fraction field, then FP # represented is 1.f  2 e–127

COE 308 (T041) – Dr. Marwan Abu-Amara 16 Floating Point (cont.) Example: What single-precision FP # does the following 32-bit word represent? … …00  sign = 1 = –ve exponent field = e = = 129 (  exponent = 129–127 = 2) fraction field = f =.0100…00 2 = = 0.25  FP # = –1.f  2 e–127 = –1.25  2 129–127 = –1.25  4 = –5 Range of exponent field (i.e. e) is from 1 to 254 (i.e. exponent is from –126 to 127)  e = 0 or 255 are used to represent special values

COE 308 (T041) – Dr. Marwan Abu-Amara 17 Floating Point (cont.) efFP # RepresentedComment 255= 0  255  0 NaNNot a Number 0= 00 0  0 denormal # (or subnormal #) Deals with very small values

COE 308 (T041) – Dr. Marwan Abu-Amara 18 Floating Point Addition What is the sum of 1,234, &.0011?  Need to line up the decimal points first  This is the same as shifting the significand while changing the exponents 1,234, =  = 1.1  =  10 6  Add significands (using integer addition) Significand sum= =  Normalize the result, if needed Result =  10 6

COE 308 (T041) – Dr. Marwan Abu-Amara 19 Floating Point Addition (cont.) Binary FP Addition Algorithm:  Similar to decimal FP addition method  Let e i = exponent, s i = significand (i.e. 1 + f i = 24 bits), then steps of algorithm are: 1. If e 1 < e 2, swap the operands, calculate d = e 1 – e 2 (note that d  0), and set exponent of result to e 1 2. Shift s 2 by d places to the right 3. Add s 1 & result of step 2, and store result in s 1 4. Normalize:  If result of step 3 (i.e. s 1 )  2  Shift s 1 by 1 place right & add 1 to exponent  If s 1 < 1  Shift s 1 to left until leftmost binary digit is 1 & subtract # of shifts from exponent  If s 1 = 0  Load special zero pattern into exponent  Otherwise, do nothing (i.e. done)