Intro to Logic Synthesis 1 Introduction to Logic Synthesis Maciej Ciesielski Univ. of Massachusetts Amherst, MA

Intro to Logic Synthesis 2 Outline Synthesis flowSynthesis flow Two-level synthesis (PLA)Two-level synthesis (PLA) –Exact methods –Heuristic methods Multi-level synthesis (standard cells/FPGA)Multi-level synthesis (standard cells/FPGA) –Structural synthesis Algebraic vs BooleanAlgebraic vs Boolean –Functional decomposition Traditional – disjoint decompositionTraditional – disjoint decomposition BDD-based bidecomposition (Boolean)BDD-based bidecomposition (Boolean)

Intro to Logic Synthesis 3 Synthesis Flow Logic synthesis HDL specification Techn-independent optimization Techn-independent optimization Technology mapping Technology mapping Cell library Manufacturing Front-end parsing Front-end parsing

Intro to Logic Synthesis 4 What is Logic Synthesis? D XY Given:Finite-State Machine F(X,Y,Z,, ) where: X: Input alphabet Y: Output alphabet Z: Set of internal states : X x Z Z (next state function, Boolean) : X x Z Y (output function, Boolean) Target:Circuit C(G, W) where: G: set of circuit components {Boolean gates, flip-flops, etc} W: set of wires connecting G Combinational logic Sequential logic

Intro to Logic Synthesis 5 Logic Optimization methods Logic Optimization Multi-level logic (standard cells) Multi-level logic (standard cells) Two-level logic (PLA) Exact (QM) Heuristic (espresso) Heuristic (espresso) Structural (SIS) Structural (SIS) Functional (AC, Kurtis) Functional (AC, Kurtis) Functional (BDD-based) Functional (BDD-based) algebraic Boolean

Intro to Logic Synthesis 6 Two-Level (PLA) vs. Multi-Level PLA control logic constrained layout, PLA highly automatic technology independent Minimize # product terms Very predictable Multi-level Logic all logic standard cells, FPGAs automatic partially technology independent Minimize gates (~literals, transistors) Hard to predict E.g. Standard Cell Layout

Intro to Logic Synthesis 7 Two-level Logic Minimization Representations: Cubes (products of literals) Sum of products (SOP)

Intro to Logic Synthesis 8 Cube and SOP representations bc ac ab c a b = on-set minterm (f = 1) = off-set minterm (f = 0) = don’t care-set minterm (f = x) A function can be represented by a sum of products (cubes): f = ab + ac + bc A set of cubes that represents function f is called a cover F of f. Two-level minimization seeks a minimum size cover (least number of cubes). Reason: minimize number of product terms in PLA

Intro to Logic Synthesis 9 PLA’s - Multiple Output Functions A PLA is a function f : B n  B m represented in SOP form: f2f2 f3f3 f1f1 n=3, m=3 aabbcc abc f 1 f 2 f Personality Matrix AND plane OR plane

Intro to Logic Synthesis 10 Two-level minimization Initial representation: x y z 0 – – – – 1 f 1 f x y z f1f1 f2f2 101 f1f1 f2f x y z 0 – – 1 f 1 f Minimized function:

Intro to Logic Synthesis 11 Definitions: Irredundant Cubes bc ac ab c a b bc ac not covered, so ab is irredundant F\{ab}  f Definition 1: A cube c i  F is irredundant if F\{c i }  f A cover is irredundant if all its cubes are irredundant.

Intro to Logic Synthesis 12 Prime, Essential cubes and covers Definition 2: A cube is prime if it is not contained in any other cube. A cover is prime if all its cubes are prime. Definition 3: A prime of f is essential if there is a minterm in that prime that is in no other prime. Example: f = abc + b’d + c’d is prime and irredundant. abc bd cd d a c b abcd abcd’

Intro to Logic Synthesis 13 Quine-McCluskey Procedure (Exact) Q-M Procedure : 1. Generate all primes (f+d), call it {P i } 2. Generate all minterms of (f+d), call it {m i } 3. Build a covering (prime implicant) matrix B, where B ij = 1 if m i  P j = 0 otherwise 4. Solve the minimum column covering problem for B (unate covering problem), UCP. Theorem (Quine): There is a minimum cover that is prime Given initial cover for F = (f,d,r), find a minimum cover G of primes where: f  G  f+d G is a prime cover of F ; f = on-set, r = off-set, d = don’t care set

Intro to Logic Synthesis 14 Covering table xyxy xyxy xyxy xyxy zwzw zwzw zw zwzw xzxz y w (on set) (don’t care set) Primes: y’ + w + x’z’ Example y’y’wx’z’ x y z’ w x’ y z w x’ y z’ w x’ y’ z’ w’

Intro to Logic Synthesis 15 Covering Table Recall: An essential prime is any prime that uniquely covers a minterm of f. Solution: {p 1,p 2 }   y + w is minimum prime cover. (Also w +  x  z) Possible approach (SAT): (p 1 +p 3 )(p 2 +p 3 )(p 1 +p 2 )p 2 = 1 Minterms of f y’y’wx’z’ x y z’ w x’ y z w x’ y z’ w x’ y’ z’ w’ Row singleton (essential minterm) Essential prime Primes of (f+d) ( p1 p2 p3 )

Intro to Logic Synthesis 16 Table reduction - Column Dominance Definition: A column P 1 whose 1-entries are a superset of another column P 2 is said to dominate P 2. Example: P 1 dominates P 2 (it has 1 everywhere P 2 has) P 1 P We can remove dominated column P 2 since P 1 covers all those rows and more. We would never choose P 2 in a minimum cover since it can always be replaced by P 1.

Intro to Logic Synthesis 17 Row Dominance and equality Definition: A row m 1 whose set of primes contains the set of primes of row m 2 is said to dominate m 2.. Example: m m m 1 dominates m 2 : it has 1 everywhere m 2 has 1 Dominating row We can remove dominating row m 1 : any prime that covers m 2 also covers m 1 (i.e., m 1 is covered automatically with fewer primes). Row Equality: In practice, many rows are identical. That is there exist minterms that are contained in the same set of primes.

Intro to Logic Synthesis 18 Pruning the Covering Table 1.Remove all rows covered by essential primes (columns in row singletons). Put these primes in the cover G. 2. Group identical rows together and remove dominating rows. 3. Remove dominated columns. For equal columns, keep one prime to represent them. 4. Newly formed row singletons define essential primes. 5. Go to 1 if covering table decreased. The resulting reduced covering table is called the cyclic core. This has to be solved (unate covering problem). A minimum solution is added to G (set of essential primes). The resulting G is a minimum cover.

Intro to Logic Synthesis 19 Quine-McCluskey Procedure: Example Cyclic Core Essential primes + column dominance: G = P1 + P3 Essential prime + column dominance G = P1 Row dominance Initial cover table: [primes  minterms] Simplify the covering table and solve unate covering problem Use branch and bound with bounding heuristics.

Intro to Logic Synthesis 20 Generating Primes - single output func. Tabular method (based on consensus operation): Start with all minterm canonical form of F Group pairs of adjacent minterms into cubes Repeat merging cubes until no more merging possible; mark (  ) + remove all covered cubes. Result: set of primes of f. Example: F = x’ y’ + w x y + x’ y z’ + w y’ z w’ x’ y’ z’  w’ x’ y’ z  w’ x’ y z’  w x’ y’ z’  w x’ y’ z  w x’ y z’  w x y z’  w x y’ z  w x y z  w’ x’ y’  w’ x’ z’  x’ y’ z’  x’ y’ z  x’ y z’  w x’ y’  w x’ z’  w y’ z w y z’ w x y w x z x’ y’ x’ z’ F = x’ y’ + w x y + x’ y z’ + w y’ z

Intro to Logic Synthesis 21 Heuristic 2-level logic minimization (espresso) Consider F(a,b,c) initially specified as: f = {abc, abc, abc} (on-set), and d ={abc, abc} (don’t care set) off on don’t care abc is redundant a is prime F 3 = a+abc Expand abc  bc Expand abc  a F 2 = a+abc + abc F 4 = a+bc F 1 = abc + abc+ abc a c b

Intro to Logic Synthesis 22 Multi-level Logic Minimization Representations: Boolean networks (structural) Factored forms (algebraic) Binary decision diagrams, BDD (functional)

Intro to Logic Synthesis 23 General Multi-level Logic Structure Combinational optimizationCombinational optimization –keep latches/registers at current positions, keep their function –optimize combinational logic in between Sequential optimizationSequential optimization –change latch position/function (retiming)

Intro to Logic Synthesis 24 Optimization Criteria for Synthesis The optimization criteria for multi-level logic is to minimize some function of: 1.Area occupied by the logic gates and interconnect (approximated by literals = transistors in technology independent optimization) 2.Critical path delay of the longest path through the logic 3.Degree of testability of the circuit, measured in terms of the percentage of faults covered by a specified set of test vectors for an approximate fault model (e.g. single or multiple stuck-at faults) 4.Power consumed by the logic gates 5.Noise Immunity 6.Place-ability, Wire-ability while simultaneously satisfying upper or lower bound constraints placed on these physical quantities

Intro to Logic Synthesis 25 Network Representation Boolean network: directed acyclic graph (DAG) node logic function representation f j (x,y) node variable y j : y j = f j (x,y) edge (i,j) if f j depends explicitly on y i Inputs x = (x 1, x 2,…,x n ) Outputs z = (z 1, z 2,…,z p ) External don’t cares: d 1 (x), …, d p (x)

Intro to Logic Synthesis 26 Boolean network Inputs Outputs Internal nodes, single-output functions Goal: minimize some measure of network complexity - number of 2-input gates - number of literals (variables), represe Eventually, the nodes have to be mapped to standard cells (technology mapping)

Intro to Logic Synthesis 27 Factored Forms Definition 4: a factored form can be defined recursively by the following rules: A factored form is either a product or sum where: a product is either a single literal or a product of factored forms a sum is either a single literal or a sum of factored forms A factored form is a parenthesized algebraic expression. product of (sums.. ) of products …, or a (sum..) of products of sums … Examples of factored forms: x, y’, abc’, a+b’c, ((a’+b)cd+e)(a+b’)+e’ (a+b)’c is not a factored form since complementation is not allowed, except on literals.

Intro to Logic Synthesis 28 Factored Forms Factored forms are more compact representations of logic functions than the traditional sum of products form. Example: - factored form (a+b)(c+d(e+f(g+h+i+j) - equivalent SOP representation ac+ade+adfg+adfh+adfi+adfj+bc+bde+bdfg+ bdfh+bdfi+bdfj Three equivalent factored forms (factored forms are not unique): ab+c(a+b)bc+a(b+c)ac+b(a+c)

Intro to Logic Synthesis 29 Factored Forms Example: (ad+b’c)(c+d’(e+ac’))+(d+e)fg Advantages good representative of logic complexity (CMOS) in many designs (e.g. complex gate CMOS) the implementation of a function corresponds directly to its factored form good estimator of logic implementation complexity doesn’t blow up easily (unlike BDDs) Disadvantages not as many algorithms available for manipulation hence often just convert into SOP before manipulation

Intro to Logic Synthesis 30 Factored Forms Note: literal count  transistor count  area however, area also depends on –wiring –gate size etc. therefore very crude measure

Intro to Logic Synthesis 31 Algebraic expressions Definition 1: f is an algebraic expression if f is a set of cubes (SOP), such that no single cube contains another Example: a+ab is not an algebraic expression (factoring gives a(1+b) ) Definition 2: f g is an algebraic product if f and g are algebraic expressions and have disjoint support (that is, they have no input variables in common) Example : (a+b)(c+d)=ac+ad+bc+bd is an algebraic product But: (a+b)(c+d+a’)=ac+ad+bc+bd+a’b is not algebraic (a, a’)

Intro to Logic Synthesis 32 Transformation-based Synthesis All modern synthesis systems are build that way – –set of transformations that change network topology work on uniform network representation – –Transformations are mostly algebraic ! (very little is based on Boolean factorization – … till now) Transformations differ in: – –the scope they are applied local scope versus global restructuring – –the domain they optimize combinational versus sequential timing versus area technology independent versus technology dependent – – the underlying algorithms they use BDD-based, SAT based, structure based

Intro to Logic Synthesis 33 Manipulation of Boolean Networks Basic Techniques: structural operations (change topology) –Algebraic: ab + ac = a(b+c) –Boolean: a + bc = (a+b)(a+c) node simplification (change node functions) –don’t cares –node minimization All algorithms used in today’s commercial synthesis tools use ALGEBRAIC techniques – not as efficient as Boolean methods, but believed to be faster (no longer true with BDD-based decomposition methods)

Intro to Logic Synthesis 34 Structural Operations (algebraic) Basic Operations: 1. Decomposition (single function) f = abc+abd+a’c’d’+b’c’d’  f = xy+x’y’, x = ab, y = c+d 2. Extraction (multiple functions) f = (az+bz’)cd+e g = (az+bz’)e’ h = cde  f = xy+e, g = xe’, h = ye, x = az+bz’, y = cd 3. Factoring (series-parallel decomposition) f = ac+ad+bc+bd+e  f = (a+b)(c+d)+e

Intro to Logic Synthesis 35 Structural Operations, cont’d. 4. Substitution g = a+b f = ac+bc + d  f = gc+d 5. Collapsing (elimination) f = ga+g’b g = c+d  f = ac+ad+bc’d’ Note: algebraic division plays a key role in all these algorithms: given function f, find g, such that f = g h, where support(g)  support(h) = 

Intro to Logic Synthesis 36 Factoring vs. Decomposition Factoring: f=(e+g’)(d(a+c)+a’b’c’)+b(a+c) Decomposition: y(b+dx)+xb’y’, where: x = a+c, y = e+g’ Tree DAG

Intro to Logic Synthesis 37 Functional Decomposition (multi-level minimization) Classical Asenhurst-Curtis decomposition A-C decomposition using BDDs BDD-based bi-decomposition

Intro to Logic Synthesis 38 Overview The concept of functional decomposition Two uses of BDDs for decomposition – –as a computation engine to implement algorithms – –as a representation that helps finding decompositions Two ways to direct decomposition using BDDs – –bound set on top (Lai/Pedram/Vardhula, DAC’93) – –free set on top (Stanion/Sechen, DAC’95) – –other approaches Disjoint and non-disjoint decomposition Applications of functional decomposition: – –Multi-level FPGA synthesis – –Finite state machine design – –Machine learning and data mining

Intro to Logic Synthesis 39 Two-Level Curtis Decomposition if B  A = , this is disjoint decomposition if B  A  , this is non-disjoint decomposition X B = bound set A= free set F(X) = H( G(B), A ), X = B  A F G H A B F

Intro to Logic Synthesis 40 Decomposition Types Simple disjoint decomposition (Asenhurst) F H A GB B F G H A Disjoint decomposition (Curtis) Non-disjoint decomposition F G H A B

Intro to Logic Synthesis 41 Decomposition Chart Bound Set = {a,b} Free Set = {c,d} Incompatibility Graph  =2 G G G G Definition 1: Column Compatibility Two columns i and j are compatible if each element in i is equal to the corresponding element in j, or the element in either i or j is not specified Definition 2: Column Multiplicity  = the number of compatible sets (distinct column patterns)

Intro to Logic Synthesis 42 Fundamental Decomposition Theorems Theorem (Asenhurst) Let k be the minimum number of compatible sets in the decomposition chart. Then function H must distinguish at least k values Theorem (Curtis) Let  (A | B) denote column multiplicity under decomposition into bound set B and free set A. Then:  (A | B)  2 k  F(B,A) = H(G 1 (B), G 2 (B), …, G k (B), A) F G H B A k

Intro to Logic Synthesis 43 Asenhurst-Curtis Decomposition F(a,b,c,d) = (ab+ ab)c'+ (ab+ ab)(cd+cd) G(a,b)= ab+ab H(G,c,d) = Gc+ G(cd+cd) Bound Set = {a,b} Free Set = {c,d} Here  = 2, function H must distinguish two values need k=1 bit to encode inputs from G F G H a b c d

Intro to Logic Synthesis 44 Two-level decomposition is iteratively applied to new functions H i and G i, until smaller functions G t and H t are created, that are not further decomposable. One of the possible cost functions is Decomposed Function Cardinality (DFC). It is the total cost of all blocks, where the cost of a binary block with n inputs and m outputs is m * 2 n. Multi-Level Curtis Decomposition

Intro to Logic Synthesis 45 Typical Decomposition Algorithm Find a set of partitions (B i, A i ) of input variables X into bound set variables B i and free set variables A i For each partition, find decomposition F(X) = H i (G i (B i ), A i ) such that the column multiplicity is minimal, and compute DFC (disjoint function cardinality). Repeat the process for all partitions until the decomposition with minimum DFC is found.

Intro to Logic Synthesis 46 AC decomposition (Function G) G={g 0,g 1 }, A=g 0 g 1, B=g 0 g 1, C=g 0 g 1 g 0 =abc+abc+abc, g 1 = abc+ abc A=00C=01 B=10 Bound Set Free Set A A ABBBC C = 1 = 0 01

Intro to Logic Synthesis 47 AC decomposition (Function H) A A ABBBC C F(a,b,c,d,e) = H( g 1 (a,b,c), g 2 (a,b,c), d, e ) H=g 0 g 1 e + g 0 g 1 d + g 0 g 1 e F A=00C=01 B=10 Bound Set Free Set = 1 = 0 01

Intro to Logic Synthesis 48 AC decomposition Algorithm Reorder variables in BDD for F and check column multiplicity for each bound set For the bound set with the smallest column multiplicity, perform decomposition : – –Encode the cut nodes with minimum number of bits (log  ) – –derive functions G and H (both depend on encoding) Iteratively repeat the process for functions G and H (typically, only H) This is an ALGEBRAIC decomposition The algorithm work only for disjoint decompositions: the variables in the bound set and the free set are disjoint !

Intro to Logic Synthesis 49 Binary Decision Diagram (BDD) f = ab+a’c+a’bd 1 0 c a bb cc d 0 1 c+bd b root node c+d d Graph representation of a Boolean function - vertices represent decision nodes for variables - two children represent the two subfunctions f(x = 0) and f(x = 1) (cofactors) - restrictions on ordering and reduction rules can make a BDD representation canonical