Chapter 9 Trap Routines TRAP number (go to service routine) & RET (return from service routine) Subroutines (or Functions) JSR offset or JSRR rn (go to.

Slides:



Advertisements
Similar presentations
Chapter 7 Introduction to LC-3 Assembly Language Assembly Language Assembly Process Using the Editor & Simulator for Assembly Language Programming.
Advertisements

Chapter 10 And, Finally.... Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display A Final Collection of ISA-related.
1 System Calls (TRAPS) and Subroutines Patt and Patel Ch. 9.
Interrupts Chapter 8 – pp Chapter 10 – pp Appendix A – pp 537 &
CSS 372 Lecture 1 Course Overview: CSS 372 Web page Syllabus Lab Ettiquette Lab Report Format Review of CSS 371: Simple Computer Architecture Traps Interrupts.
Overview I/O – memory mapped programmed / interrupt driven Traps mechanism & RET Subroutines & JSR & JSRR & RET Interrupt mechanism & RTI.
Chapter 9 Overview Traps mechanism & RET Subroutines & JSR & JSRR & RET Interrupt mechanism & RTI.
S. Barua – CPSC 240 CHAPTER 10 THE STACK Stack - A LIFO (last-in first-out) storage structure. The.
Chapter 5 The LC-3 LC-3 Computer Architecture Memory Map
Chapter 6 Programming in Machine Language The LC-3 Simulator
Chapter 9 TRAP Routines and Subroutines. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 9-2 System Calls.
RapUp Dynamic Allocation of Memory in C Last HW Exercise Review for Final Final Exam Next Thursday – Same Time / Same Place.
Overview C programming Environment C Global Variables C Local Variables Memory Map for a C Function C Activation Records Example Compilation.
Chapter 9 & 10 Subroutines and Interrupts. JSR Instruction: JSR offset (11 bit) xxxxxxxxxxx [PC ]  R7, JMP Offset Jump to Subroutine at offset.
Chapters 9 & 10 Midterm next Wednesday (11/19) Trap Routines & RET Subroutines (or Functions) & JSR & JSRR & RET The Stack SSP & USP Interrupts RTI.
Chapter 9 Trap Routines & RET Subroutines (or Functions) & JSR & JSRR & RET.
Overview Projects The Assembly Process Programmed I/O Interrupt Driven I/O.
Chapter 8 Overview Programmed I/O Introduction to Interrupt Driven I/O Project 3.
Chapter 8 I/O Programming Chapter 9 Trap Service Routines Programmed I/O Interrupts Interrupt Driven I/O Trap Service Routines.
Chapters 4 & 5: LC-3 Computer Architecture Machine Instructions Assembly language Programming in Machine and Assembly Language.
Chapter 8 Overview Programmed I/O Interrupt Driven I/O.
Overview von Neumann Model Components of a Computer Some Computer Organization Models The Computer Bus An Example Organization: The LC-3.
Introduction to Computing Systems from bits & gates to C & beyond Chapter 8 Input/Output Basic organization Keyboard input Monitor output Interrupts DMA.
Chapter 8 Input/Output l I/O basics l Keyboard input l Monitor output l Interrupt driven I/O l DMA.
Chapter 10 And, Finally... The Stack. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display Stacks A LIFO.
Chapter 10 The Stack Stack: An Abstract Data Type An important abstraction that you will encounter in many applications. We will describe two uses:
Chapter 10 And, Finally... The Stack Stack: An Abstract Data Type An important abstraction that you will encounter in many applications. We will.
Introduction to Computing Systems from bits & gates to C & beyond Chapter 5 The LC-2 Instruction Set Architecture Operate instructions Data Movement instructions.
Introduction to Computing Systems from bits & gates to C & beyond Chapter 5 The LC-3 Instruction Set Architecture ISA Overview Operate instructions Data.
Chapter 5 The LC Instruction Set Architecture ISA = All of the programmer-visible components and operations of the computer memory organization.
Introduction to Computing Systems from bits & gates to C & beyond Chapter 10 The Stack Stack data structure Activation records and function invocation.
Chapter 9 Chapter 9 Subroutines and TRAPs l Privileged Instructions l TRAP Routines l Subroutines.
Introduction to Computing Systems from bits & gates to C & beyond Chapter 10 The Stack Stack data structure Interrupt I/O (again!) Arithmetic using a stack.
Introduction to Computing Systems and Programming The LC-2.
Computer Science 210 Computer Organization Machine Language Instructions: Control.
Chapter 10 And, Finally... The Stack
Chapter 9 TRAP Routines and Subroutines
Chapter 7 & 9.2 Assembly Language
Computer Science 210 Computer Organization
HKN ECE 220: Fall 2017 Midterm 1 AJ Schroeder, Evan Lissoos, Utsav Kawrani 23rd September, 2017.
Computer Science 210 Computer Organization
COSC121: Computer Systems: LC3 Traps and Subroutines
Chapter 10 And, Finally... The Stack
Chapter 9 TRAP Routines and Subroutines
Chapter 10 The Stack.
Chapter 5 The LC-3.
Arithmetic using a stack
The LC-3 Instruction Set Architecture Data Movement instructions
LC-3 Details and Examples
Computer Science 210 Computer Organization
Chapter 9 TRAP Routines and Subroutines
Computer Science 210 Computer Organization
Computer Science 210 Computer Organization
Computer Science 210 Computer Organization
HKN ECE 220: Spring 2018 Midterm 1
Introduction to Computer Engineering
Chapter 9 TRAP Routines and Subroutines
TRAP Routines Subroutines Privileged Instructions
Chapter 9 TRAP Routines and Subroutines
Chapter 10 And, Finally... The Stack
Chapter 9 TRAP Routines and Subroutines
TRAP Routines Privileged Instructions Subroutines
Chapter 9 TRAP Routines and Subroutines
School of Computer Science and Technology
HKN ECE 220: Fall 2018 Midterm 1 Andrew Fortunat, Jeff Chang, Srijan Chakraborty, Kanad Sarkar February 16, 2019.
Chapter 9 TRAP Routines and Subroutines
Chapter 9 TRAP Routines and Subroutines
Midterm 2 Review Chapters 4-16 LC-3
Chapter 9 TRAP Routines and Subroutines
Presentation transcript:

Chapter 9 Trap Routines TRAP number (go to service routine) & RET (return from service routine) Subroutines (or Functions) JSR offset or JSRR rn (go to subr) & RET (return from subroutine)

Traps 1)Execute TRAP “vector number” - Service Routine Address Trap Vectors are at memory locations [0000:00FF] Trap Vectors contain addresses of “Pre written (?)” Service Routines 2) [PC] is stored in R7 (save the return address) 3) Address of Trap Service Routine loaded into PC (addr of service routine) 4) Service Routine Program executed 7)Trap service routine program ends with an RET (to return to calling prog) [R7] loaded into PC

JSR Instruction: JSR offset (11 bit) xxxxxxxxxxx [PC ]  R7, JMP Offset Jump to Subroutine at offset from PC JSRR Instruction: JSRR Rx xxx [PC ]  R7, JMP [Reg] Jump to Subroutine at address in Rx RET Instruction: RET C1C0 [R7]  PC (JMP [R7]) Return to Instruction after Jump to Subroutine (or TRAP) Subroutines

1) Execute JSR offset or JSRR rn - Call Subroutine or Method Location of Subroutine is specified in the Instruction 2) [PC] stored in R7 (store return address) 3) Address from JSR offset or JSRR rn is loaded into PC (beginning of subr) 4) Subroutine is executed R0 likely contains passed parameter (or address) R5 may be used to return error message R0 likely contains return parameter (or address) 5) Subroutine program ends with an RET ( [R7] loaded into PC) Can you pass (return) two parameters ? Can a subroutine call another subroutine ? How does this mechanism support recursion?

Subroutines vs Traps How are Subroutines different from Traps ? –Traps are called using the TRAP instruction (Indirect call through the Trap Vector Table) Subroutines are called using JSR or JSRR instructions (JSR Direct call, JSRR Indirect call) – Both end with a RET ( load the return address) A Trap is a Subroutine call: - (Indirect) through a Vector Table ( [x0000-x00FF] ). - rather than with a PC offset (or a label)

Trap Service Routine for Character Input (P 234).ORIG x04A0 START ST R7,SaveR7 ; Save Registers JSR SaveReg LD R2,Newline ; Write “newline” JSR WriteChar ; LEA R1,PROMPT ; Write prompt character string Loop LDR R2,R1,#0 ; Get next prompt char BRz Input ; Go to Input when done JSR WriteChar ; Write character ADD R1,R1,#1 BRnzp Loop ; Input JSR ReadChar ; Read Input character ADD R2,R0,#0 ; Echo to monitor JSR WriteChar ; LD R2,Newline ; Write “newline” JSR WriteChar JSR RestoreReg ; Restore Registers & Return LD R7,SaveR7 RET ; SaveR7.FILL x0000 Newline.FILL x000A Prompt.STRINGZ "Input a character> "

Trap Service Routine for Character Input (2) WriteChar LDI R3,DSR ; Monitor Done? BRzp WriteChar STI R2,DDR ; Send Char RET DSR.FILL xFE04 DDR.FILL xFE06 ; ReadChar LDI R3,KBSR ; Keyboard Ready? BRzp ReadChar LDI R0,KBDR ; Get Char RET KBSR.FILL xFE00 KBDR.FILL xFE02 ; SaveReg ST R1,SaveR1 ; Store R1,.., R6 ST R2,SaveR2 ST R3,SaveR3 ST R4,SaveR4 ST R5,SaveR5 ST R6,SaveR6 RET ; RestoreReg LD R1,SaveR1 ; Load R1,..., R6 LD R2,SaveR2 LD R3,SaveR3 LD R4,SaveR4 LD R5,SaveR5 LD R6,SaveR6 RET ; SaveR1.FILL x0000 SaveR2.FILL x0000 SaveR3.FILL x0000 SaveR4.FILL x0000 SaveR5.FILL x0000 SaveR6.FILL x0000 ;.END Why wasn’t R7 stored on each JSR ? Why wasn’t R1–R6 stored on each JSR ? Why is SaveR7 not with SaveR1 thru SaveR6 ?

Chapter 10 The Stack is a dynamic “data structure” descending from high memory to lower memory, used to store data in a First In – Last Out order

Illustration of a Stack

Stack Operation Implemented in memory:

The STACK The S tack is a dynamic “data structure” descending from high memory to lower memory (The stack grows down ) The Stack Pointer (R6) always points to the top word on the stack. (The Stk Ptr is the “stack reference” that is available to the programmer) A new stack entry (a word) is “ PUSHed ” onto the stack To take a word off of the Stack, the top word is “ POPed” off of the stack.

The Stack Most Popular Organization Alternate Organization Initially [PC] = xFE00 Initially [PC] = begin

Stack R6 is the Stack Ptr Push: Push ADD R6, R6, #-1 ; Decrement Stack Ptr STR R0, R6, #0 ; “Push” [R0] onto Stack Pop: Pop LDR R0, R6, #0 ; “Pop” Data off of Stack (into R0) ADD R6, R6, #1 ; Increment Stack Ptr Which way does the Stack grow? Where does Stack Ptr (R6) point?

Stack Underflow Check (Stack Empty) ; Stack POP subroutine. SP is R6. Returns “data” in R0. ; Fails if the stack is empty (SP=x4000) and reports error (1 --> R5) POP LDR1, STK_Empty; Compare Stk Ptr with “Empty” ADD R2, R6, R1 BRzfail_exit; EXIT IF STACK IS EMPTY ; if ok, Pop LDRR0, R6, #0; Pop top of Stack into R0 and ADDR6, R6, #1; Increment Stk Ptr ANDR5, R5, #0; R5 <-- 0 (POP successful) RET fail_exit AND R5, R5, #0; R5 <-- 1 (POP failed - underflow) ADDR5, R5, #1 RET STK_Empty.FILL xC000; STK_Empty  -x4000 (Stack begins at x3FFF)

Stack Overflow Check (Stack too Large) ; Stack PUSH subroutine. SP is R6. Value in R0 is pushed onto the stack. ; Fails if Stack is full (SP=x3F00) and reports error (1  R5) PUSH LD R1, STK_Full; Compare Stack Ptr with “Full” ADD R2, R6, R1 BRz fail_exit; EXIT IF STACK IS FULL ; if ok, PUSH ADD R6, R6, #-1; Decrement Stk Ptr and STR R0, R6, #0; “Push” R0 onto top of Stack AND R5, R5, #0; “Report” no Error 0  R5 RET fail_exit AND R5, R5, #0; “Report Error” 1  R5 ADD R5, R5, #1 RET STK_Full.FILL xC100; STK_Full <-- -x3F00 (Stack max is x3F00)

; PUSH and POP Subroutines. STK Ptr is R6. Data in R0. Success: R0 = 0. ; Stack: x3FFF to x3F00 (256 words max). POP and PUSH are Entry Points. POP ST R2,Save2 ; R1 & R2 are used by “POP”. Save them. ST R1,Save1 LD R1,STK_Empty ; Compare Stk Ptr with “Empty” ADD R2,R6,R1 BRz fail_exit ; EXIT IF STACK IS EMPTY LDR R0,R6,#0 ; “POP” top of Stack into R0 and ADD R6,R6,#1 ; Increment stack pointer BRnzp success_exit PUSH ST R2,Save2 ; R1 & R2 are used by “PUSH”. Save them. ST R1,Save1 LD R1,STK_Full ; Compare Stk Ptr with “Full” ADD R2,R6,R1 BRz fail_exit ; EXIT IF STACK IS FULL ADD R6,R6,#-1 ; Decrement Stk Ptr and STR R0,R6,#0 ; “PUSH” R0 onto top of Stack success_exit AND R5,R5,#0 ; R5 <-- 0 (success) LD R1,Save1 ; Restore registers and Return LD R2,Save2 RET fail_exit AND R5,R5,#0 ; R5 <-- 1 (failure) ADD R5,R5,#1 LD R1,Save1 ; Restore registers and Return LD R2,Save2 RET STK_Empty.FILL xC000 ; BASE = –x4000. STK_Full.FILL xC100 ; Stack 256 words Save1.FILL x0000 Save2.FILL x0000.END Subroutine for Push & Pop What is a reasonable length for the Stack ?