High Speed Devices Group RF Pulse Modulation and the Digitally Driven Class C Power Amplifier R. Uang, J. Keyzer, A. Dalvi, Y. Sugiyama, M. Iwamoto, I. Galton and P. Asbeck, UCSD

High Speed Devices Group Introduction Digital RF generation –DSP’s are approaching the microwave regime: Intel Pentium 4 ALU operates at 4 GHz. –CMOS processes continue to be scaled in size, reducing power and increasing speed. We can use digital RF to improve modern wireless communication systems by: –Reducing power dissipation using high efficiency power amplifiers. –Using DSP to generate signals such that system can overcome limitations of PA alone. –Developing versatile “mostly-CMOS” transmitters with programmable functionality.

High Speed Devices Group Overview System Overview – RF Digital Pulsewidth Modulation The Digitally Driven Class C Power Amplifier Simulations and Experimental Results Conclusions

High Speed Devices Group Future RF Transmitters Present Microwave Transmitter DAC x I Q x + Filter x VGA PA fofo f IF (sin) DSP f IF (cos) Future Microwave Transmitter I Q f bb =f s /N Analog filter  Pulse Modulator PA f clk DSP Digital Upconverter DSP x 8

High Speed Devices Group Desired RF signal with AM and PM RF pulse modulated waveform  RF pulse modulated waveform Concept: Digital  RF Pulse Modulation

High Speed Devices Group Concept: Digital  RF Pulse Modulation t RF(t) (Pulse Position) (Pulse Wdith)

High Speed Devices Group  Pulse Modulator Block Diagram  Modulator  in (t) f clk Digital pulse Position Modulator 3 Bit Word Pulse Generator 8 f clk A in (t) Digital Pulse Width Modulator 1.5 Bit Word Phase Modulation Envelope Modulation  Modulator f clk 8 f clk RF Output

High Speed Devices Group Simulations Single tone: spur level typically below - 55 dBc in desired band. Delta-Sigma modulator shapes quantization noise away from signal of interest. CDMA: Linearity Test Meets IS-95 ACPR Specs CDMA (broad band view) Single Tone

High Speed Devices Group The Digitally Driven Class C Power Amplifier t Vin RF Pulse Digital Input Replace modulated sinusoidal input with RF digital pulse modulated signal Input is digital pulse train with varying pulse width and position I D assumes pulse shape Desired output is modulated sinusoid Vout t Vdd Load GaAsFET RFC C L Shunt LC Resonator IDID

High Speed Devices Group Digitally Driven Class C PA - VDVD ωtωt 2π2π 0 π V dd V min t IDID W < T/2 T/2 T 0 I max T/4 Power at fundamental (W) Efficiency and Output Power vs. Conduction Angle Conduction Angle (Degrees) Drain Efficiency (%) Class C Traditional PA Pout Drain Efficiency Drain Efficiency Pout Digitally Driven PA

High Speed Devices Group Simulated PA Performance: R L,opt R l,opt coincides with max voltage swing at output, max power at fundamental. PatternRlopt ADSRlopt Analysis 1’s49Ω41Ω 3’s16Ω13Ω Peak efficiency does not occur at fixed R l for varying pulse widths. Optimum load occurs before maximum drain efficiency is reached.

High Speed Devices Group Experimental Test Setup Pattern generator outputs looping bit sequence Serializer multiplexes to high data rate (3.2 Gbps), 900mV signal swing Laser driver amplifies signal 2x to 2.5V max swing (adjustable) Matlab Generated Sequences 1 bit 3.2 Gbps Conexant CX60061 OC-192 Serializer 16 bits 200 Mbps HP16522A Pattern Generator Synchronized 200 MHz / 3.2GHz Clocks 16:1 Conexant CX60077 Laser Driver Class C PA under testing Amplified Output

High Speed Devices Group Experimental Results: Pulse Train Measured efficiency for 3’s exceeds calculated value. Measured efficiency for 1’s is much less than expected. Pattern Drain Efficiency CalculatedSimulatedMeasured 1’s73%55%39% 3’s59%63%74.5% Prototype Class C PA

High Speed Devices Group Experimental Results: CDMA Linearity Results to Date “CDMA” signal - OQPSK at 400MHz Po = dBm, 22% Drain Efficiency IS-95 ACPR specifications overlaid in red Input to PA Output 5dB/div 30 kHz BW 5dB/div 30 kHz BW

High Speed Devices Group Conclusions A novel Digitally Driven Class C Power Amplifier has been demonstrated using a commercial power GaAsFET. This new variant of the Class C PA presents many unique challenges in its design and implementation. RF Digital Pulsewidth Modulation combined with the Digitally Driven Class C Power Amplifier may potentially provide a means for high efficiency, high linearity, easily reconfigured RF and microwave transmitters.

High Speed Devices Group Simulated PA Performance: R L,opt R l,opt coincides with max voltage swing at output, max power at fundamental. PatternRlopt ADSRlopt Analysis 1’s49Ω41Ω 3’s16Ω13Ω RlRl Power of fundamental (W) Power of fundamental vs. Load Resistance Rlopt for 3’s Rlopt for 1’s including package model 3’s 1’s Peak efficiency does not occur at fixed R l for varying pulse widths. Optimum load occurs before maximum drain efficiency is reached.