Digital Video Recorder Update Eric Bowden, Matt Ricks, Irene Thompson

Wed., February 29, 2006Digital Video Recorder2 Presentation Roadmap Introduction & Logistics Introduction & Logistics Interfaces Risks Brief Project Review Timeline Bill of Materials

Wed., February 29, 2006Digital Video Recorder3 What is a Digital Video Recorder? A video capture unit for live television signals Baseline Functionality Pause Live TV Never miss part of a show again due to interruptions Rewind Live TV For up to 15 minutes of the broadcast Fast Forward Allows the user to skip through selected portions of the buffered broadcast

Wed., February 29, 2006Digital Video Recorder4 Schedule April 2006  Design Finalized May 2006  Materials Ordered June/July/August 2006  Fabrication of PCI Board  Programming of: Kernel, Microcontroller, and User Interface September 2006  Integration of Hardware and Software October 2006  Debugging November/December 2006  Implementation of Extensions

Wed., February 29, 2006Digital Video Recorder5 Bill of Materials Part NumberDescriptionVendor S5335Matchmaker PCI InterfaceAMCC EL4581CNVideo sync separatorElantec (near-equiv from National) 74HC14Hex Schmitt inverting bufferTexas/National/Motorola 74HC bit async. binary counterTexas/National/Motorola 74HC74Dual 'D' latch with set/resetTexas/National/Motorola 74HC4017Decade counterTexas/National/Motorola 74HC00Quad NAND gateTexas/National/Motorola 74HC5418-bit data bufferTexas/National/Motorola SMJ Bit Multiport VRAMTexas

Wed., February 29, 2006Digital Video Recorder6 Presentation Roadmap Internal Analog Interface/Processing Internal Digital Interface Introduction & Logistics Interfaces Risks Introduction & Logistics

Wed., February 29, 2006Digital Video Recorder7 Video Compression JPEG H.261 MPEG

Wed., February 29, 2006Digital Video Recorder8 What is MPEG Moving Pictures Experts Group Supports JPEG and H.261 through downward compatibility Supports higher Chrominance resolution and pixel resolution (720x480 is standard used for TV signals) Supports interlaced and noninterlaced modes Uses Bidirectional prediction in “ Group Of Pictures ” to encode difference frames.

Wed., February 29, 2006Digital Video Recorder9 MPEG Bitstream Source:

Wed., February 29, 2006Digital Video Recorder10 Bidirectional Coding I = Intra – Anchor picture P = Forward predicted B = Bidirectionally predicted Source: “ Parallelization of Software Mpeg Compression ”

Wed., February 29, 2006Digital Video Recorder11 Digital Interface Two major digital paths 1. Sending digitized A/V signal to the host program for storage and manipulation. 2. Retrieving A/V for decompression and display from the host program.

Wed., February 29, 2006Digital Video Recorder12 PCI Interface Chip AMCC S5335 Matchmaker PCI 2.1, 3.3V-Signalling Interface Chip 33 MHz, 132 MB/s

Wed., February 29, 2006Digital Video Recorder13 Basic Operation: Card to Host Of Matchmakers and Mailboxes The Matchmaker chip serves as a target for the PCI Card microcontroller. It takes care of the PCI bus timing and ISR handling.

Wed., February 29, 2006Digital Video Recorder14 Basic Operation: Host to Card The host application will be in charge of which data is sent back to the PCI Card. Therefore, it will send I/O Request Packets (via the kernel module) to the device containing data to output. The Matchmaker chip has a provision for Data Pass-Thru lines; this will allow the data to go straight to the uC for assembly and output.

Wed., February 29, 2006Digital Video Recorder15 The Mediator (Device Driver) Most difficult part on the digital side. The driver is conceptually like a DLL. Uses DriverEntry and DriverObject to register functionality with the OS. Driver processes requests (IRP) sent from applications in user mode. Also registers the ISR with OS to manage incoming data from the PCI card.

Wed., February 29, 2006Digital Video Recorder16 Presentation Roadmap Risks Introduction & Logistics Interfaces Risks

Wed., February 29, 2006Digital Video Recorder17 Risks Speed, not being able to store live video faster than we receive it. Kernel Module, difficulty factor unknown Needing to manufacture multiple PCI boards (unsoldering pins) Traces not lining up nicely = Multi-layer board Commercial Detection Compression backlog (Frame dropping) Different chip or Different compression codec

Wed., February 29, 2006Digital Video Recorder18 The End