05/11/06Sasha Pronko, Silicon Workshop II, UCSB1 PORTCARDs & DOIMs Sasha Pronko Fermilab

05/11/06Sasha Pronko, Silicon Workshop II, UCSB2 PortCard & DOIM: what & where?

05/11/06Sasha Pronko, Silicon Workshop II, UCSB3 PortCart requirements oLow mass & size oHigh radiation dose oReliability oHigh heat transfer capability oRemote control and data transmission oLow noise regulated voltage oDetector grounding strategy

05/11/06Sasha Pronko, Silicon Workshop II, UCSB4 PortCard functions oPowers, initializes, controls and read out chips –Connects to SVX3 chips by High Density Interconnects (HDI) –Power for analog section of chips –Calibration voltages for z &  sides –Interface with FIB –Forwards L1A accept to chips –Buffers FECLK & BECLK –Forwards data to FIB

05/11/06Sasha Pronko, Silicon Workshop II, UCSB5 PortCard basics oPC—beryllia based multi-chip module oOne PC per wedge: –SVX: 72 PC’s; ISL: 30 PC’s; L00: 12 PC’s HDI’s to ladders Power/commands from JC/FIB Data & OBVD to FIB

05/11/06Sasha Pronko, Silicon Workshop II, UCSB6 PortCard components oPer PC –1 Transceiver oPer Ladder –1 analog DDR; –1 digital DDR; –2 ELCO’s; –2 JFET’s; –NPN –DOIM DDR — Digital to Analog Converter/Decoder/ Regulator chip

05/11/06Sasha Pronko, Silicon Workshop II, UCSB7 PortCard: Digital section o11 Commands & CLKs –53 MHz clock –Beam X-ing clock –L1A signal –etc. (SVX3D by Ankush) oDVDD power supplies oData transmission –DOIM oComponents –Transceiver Receives FIB commands & CLKs, transforms them into single-ended signals –digital DDR Decoder Buffers CLKs

05/11/06Sasha Pronko, Silicon Workshop II, UCSB8 PortCard: Analog section oVoltages –AVDD to FE –Bias to sensors oComponents –Analog DDR FE voltage regulation DAC-calibration voltage –JFET & NPN transistors

05/11/06Sasha Pronko, Silicon Workshop II, UCSB9 PortCard location L00 & ISL PC’s are in the same place

05/11/06Sasha Pronko, Silicon Workshop II, UCSB10 PortCard location, continued oPC need to be cooled

05/11/06Sasha Pronko, Silicon Workshop II, UCSB11 PortCard: Performance stability & Radiation hardness oPerformance –Noise SSD  DAQ  Noise SSD  PC  DAQ oRadiation hardness –Rick Tesarek says (Run2 measurement) that ionizing doze for SVX PC is 20 krad/fb -1 (~10% error) –~ krad in Run2 (4-8 fb -1 ) –PC designed hardness is ~200 krad –L00 bias issues Degradation of dielectric  possible problems with HV bias (specification is ~200V, L00 may need to be biased up to much higher voltages)

05/11/06Sasha Pronko, Silicon Workshop II, UCSB12 PortCard: Radiation Hardness Tests oRadiation hardness tests with 63 MeV protons (UC Davis) and 8 GeV protons (Fermilab) –2 PC’s irradiated: 200 krad & 400 krad –400 krad PC was used for long term reliability testing with resistive loads No failure after 3 months No change in TX & DDR current draws No change in DDR DAC calibration voltage slope change No shift in pedestals; no change in noise –JFET & NPN irradiated by ~500 krad No problems with analog voltage regulation observed oPC’s should withstand the radiation dose expected for Run 2

05/11/06Sasha Pronko, Silicon Workshop II, UCSB13 DOIM basics oDOIM — Dense Optical Interface Module –Converts electrical signal from SVX chip into optical signal (interface between chip & FIB) –53 Mbyte/sec/DOIM data transfer rate; –8 bits & OBVD; bit error rate < at 63 MHz –3 major components: transmitter (TX), 22m fiber, receiver (RX) –1 DOIM per ladder –Radiation tolerance up to 200 krad

05/11/06Sasha Pronko, Silicon Workshop II, UCSB14 DOIM: component location oTX on PC (5 TXs per PC in SVX) o10 RX (2 wedges) on Fiber Transition Module (FTM)

05/11/06Sasha Pronko, Silicon Workshop II, UCSB15 DOIM: TX oTX — InGaAsP edge emitting laser diode array –12 channel (9 used); 250  m pitch matches fiber –Power supply: V CC -V LD V CC =5V & V LD adjustable –current: 20 mA/ch at 3V; slope ~2mA/0.1V –Differential amplifier is sensitive up to 10mV –Light output: 1 –Light cone: uniformity in far field angle affects light coupling (~400  W span)

05/11/06Sasha Pronko, Silicon Workshop II, UCSB16 DOIM: RX oRX — InGaAs/InP PIN-diode array –12 channels (9 used) –Power supply: V CC =5V –Optical input converted to current pulse to receiver chip

05/11/06Sasha Pronko, Silicon Workshop II, UCSB17 DOIM: TX & RX characteristics Digital 1 = Digital 0 = Digital 1 = Digital 0 = We have bit stuck low or bit stuck high errors if these characteristics are out of range

05/11/06Sasha Pronko, Silicon Workshop II, UCSB18 DOIM: OBVD & 8 bits oOBVD & 8 bits — SVX chip (Ankush’s talk) oExample of TX output

05/11/06Sasha Pronko, Silicon Workshop II, UCSB19 DOIM: Temperature sensitivity oTX is sensitive to temperature (not an issue for RX) oRX designed to operate at 40-60% duty cycle

05/11/06Sasha Pronko, Silicon Workshop II, UCSB20 DOIM: Radiation Hardness of RX oBeam tests with protons: 200krad & 400krad oLinear dependence to dose oRatio of light drop independent on light power oDegradation is <10% per 200 krad

05/11/06Sasha Pronko, Silicon Workshop II, UCSB21 Summary oPC’s & DOIM’s provide an interface between sensors/chips and PS, DAQ oPC’s performance is stable respect to radiation dose expected for Run2 oDOIM –TX sensitive to temperature –10% degradation per 200 krad — it should be enough for Run2 –RX sensitive to duty cycle oSources of info: –cdf5535, cdf3865, cdf6497, cdf7281, ESE- SVX980318, old talks, TDR