PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC1 Herschel PACS - IIDR SIGNAL PROCESSING UNIT (SPU) HW Unit, Start-up SW and Low-level SW Drivers José M. Herreros INSTITUTO DE ASTROFÍSICA DE CANARIAS

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC2 SPU REQUIREMENTS SPU HW Requirements are defined in the “PACS SPU Requirements Specification Document”, Doc No.: PACS- IAC-SP-001, Issue/Rev : draft 0, 24 Sep Two RED MARKED copies available. ISSUE 1 on elaboration. SPU Start-up SW and Low-level SW Drivers Requirements are defined in the “LFI-REBA and PACS-SPU Start-up SW and Low-level SW Drivers URD” Document. Doc No.: PACS-IC-RD HW-SW ICD Defined in Doc No.: FPL-IC CRS. CRISA Design Proposal dated 2/12/99 available. Documents to be available in the near future are listed in this report.

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC3 SPU OVERVIEW

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC4 SPU MECHANICAL ASSEMBLY (1)

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC5 SPU MECHANICAL ASSEMBLY (2)

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC6 SPU UNIT BUDGETS

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC7 SPU INSTRUMENT INTERFACES

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC8 SPU COMMUNICATIONS INTERFACES

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC9 SPU S/C INTERFACES

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC10 SPU INTERCONNECTING DIAGRAM

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC11 SPU FUNCTIONAL SUBUNITS SWL AND LWL SPU PROVIDE THE HW AND START-UP SW FOR REDUCTION AND COMPRESSION OF THE SHORT AND LONG WAVE DETECTORS DATA. PSU CONVERTS THE S/C PRIMARY VOLTAGE TO SECONDARY VOLTAGES REQUIRED BY THE SPU. DAU PROVIDES A SET OF SPU ANALOG HK DATA TO DEC/MEC UNIT

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC12 SPU FUNCTIONAL BLOCK DIAGRAM Each CPU board includes:  One DSP working at 18 MHz (TBC)  One 32 KW x 48 Boot PROM bank  Three EDAC protected SRAM memory banks:  Up to 256 KW x 48 for Program RAM  Up to 128 KW x 32 for Data RAM  Up to 512 KW x 32 for exp. of Data RAM  One EDAC protected up to 256 KW x 48 EEPROM memory bank.  Three IEEE1355 DS links including one common 8KWx32 Dual Port RAM buffer  Two PSC ASICs including:  Watchdog, OBT and 32 bit Timers.  EDAC logic and Interrupt management.  Programmable Address decoding and Wait State generator.  One Auxiliary Board Interface  One Mother Board Interface Each CPU board executes its own specific Start Up and Application Software.

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC13 SPU MEMORY ORGANIZATION NOT IMPLEMENTED (TBC) X

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC14 START-UP SW Both SWL-SPU and LWL-SPU contain their own separate but identical PROM SW activated simultaneously during the switch-on of the SPU. The SPU_SUSW will communicate with the DPU_ASW through a IEEE 1355 link, where the DPU_ASW is the master, sending commands and the SPU_SUSW, the slave, executing the commands and sending responses. CONTEXT DIAGRAM

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC15 START-UP SW MAIN FUNCTIONS  Shall initialise the unit at power-on or under a software reset.  Shall perform a self-test to check the health of the unit  Shall configure and initialise the IEEE-1355 link to communicate with the DPU_ASW.  Shall allow to load and dump programs and data segments into/from memory  Shall allow to start the application software and giving it the control. Shall leave the units for the application software in a well known configuration.

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC16 LOW-LEVEL SW DRIVERS The LLSWDRV library include functions, to be used by the application SW, to allow access to the hardware devices of the unit. The library will be provided as source code modules of functions which will be compiled/linked with the application SW.

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC17 START-UP SW SWITCH ON PROCEDURE Both LWL-SPU and SWL- SPU have the same switch- on procedure. Both sub-units share the same PSU, being booted by the CDMS at the same time. Is up to the DPU_ASW to proceed first with one or the other.

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC18 SPU LIMITED FUNCTIONAL TEST (LFT) LFT OBJECTIVE: To check that the SPU performs as specified in a representative operational environment of the PACS SPU Application SW. MAIN CHARACTERTERISTICS OF THE LFT ARE: –An application SW developed under Virtuoso shall be executed on the SPU. –The application shall communicate through the 1355 links with the “DPU and DECMEC simulators”. –LLSWDRV functions shall be linked with the application SW. –The application SW shall be loaded in the same way as the real SPU application. –The same application shall be executed in the SWL-SPU and LWL-SPU

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC19 SPU TEST SET-UP FOR LFT (1)

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC20 SPU TEST SET-UP FOR LFT (2)

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC21 SPU TEST SET-UP FOR LFT (3)

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC22 SPU MODEL PHILOSOPHY (1)

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC23 SPU MODEL PHILOSOPHY (2) CANCELLED

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC24 CRITICAL/PROBLEM AREAS IMPORTANT ROTATION ON CRISA’S (NOW ASTRIUM) PERSONNEL HAS AFFECTED TO THE PROJECT AND, IN PARTICULAR, TO THE FOLLOWING AREAS: –COMPONENTS PROCUREMENT AND, –TECHNICAL MANAGEMENT.

PACS IIDR 01/02 Mar 2001 Herschel PACS SPU - IAC25 CRISA STATUS (JANUARY PROGRESS REPORT ATTACHED)