CPU, Stored-Program Concept, Program Execution CSC-255 Lecture 5 CPU, Stored-Program Concept, Program Execution (Covers Brookshear Chapter 2) Modified by Ufuk Verun from Jim Janossy © 2002, DePaul University CTI – Chicago and Brookshear © 2003 Pearson Education, Inc. CSC255-702/703 - CTI/DePaul

Resources This PowerPoint presentation is available for download at www.depaul.edu/~uverun/classes/CSC255/fall2002/slides/Lecture_05.ppt Texbook: Chapter 2, Appendix C A Simple Machine Simulator: http://wwwes.cs.utwente.nl/software/simpsim Print slides at 6 slides/page, avoid waste! Exams are based on slide content, homework and assigned readings CSC255-702/703 - CTI/DePaul

Algorithmic Machine Must be able to: Manipulate stored data Perform operations on data Coordinate sequence of operations Central Processing Unit (CPU) does it (in general) CSC255-702/703 - CTI/DePaul

Basic Computer Components Overview Central Processing Unit (CPU ) Memory (RAM – Random Access Memory) CPU and RAM are installed on the main circuit board (motherboard) CPU and RAM communicate on bus Disk drive, motherboard, power supply There are also devices such as graphics adaptor card, network interface card (NIC), sound card, etc. CSC255-702/703 - CTI/DePaul

Computer Components Diagram CSC255-702/703 - CTI/DePaul

Memory-Mapped Input/Output CSC255-702/703 - CTI/DePaul

Central Processing Unit ALU CU CSC255-702/703 - CTI/DePaul

Registers Similar to memory cells, but with a lot faster access time Located as part of the CPU There is no bus transfer to access the register Usually limited number of registers CPU has a limited capacity for components, therefore cannot pack so many registers Usually 8, 16, or more (depending on the architecture) CSC255-702/703 - CTI/DePaul

Registers… Temporary holding place for data being manipulated by the CPU and ALU operations In most architectures, ALU is not allowed to manipulate data directly in memory cells Data in memory needs to be moved to a register first There are two types of registers: Special purpose (Program Counter -– PC, Instruction Register –- IR) General purpose (e.g., R0, R1, R2, …) CSC255-702/703 - CTI/DePaul

Example: CPU/Registers and Main Memory Example from Appendix C in Textbook CSC255-702/703 - CTI/DePaul

Memory Usage Facts Registers hold data immediately applicable to an operation Cache holds recently used memory RAM holds data needed soon External storage (“mass storage”, such as hard disk) holds data and instructions not needed immediately Price decreases, capacity increases CSC255-702/703 - CTI/DePaul

Control Unit Transfers data from memory to register Tells ALU when and which register has data Activates logic circuits in ALU Tells ALU which register to put result in Transfers data from register to memory (if asked) Speed is usually measured in MIPs (millions of instructions per second) CSC255-702/703 - CTI/DePaul

Bus Connects CPU, memory, disk, and other components CPU can access data through the bus by specifying the memory cell address Usually 16 or 32 bits “wide” (parallel bit transfer, not serial one-at-a-time) Bus Speed (bits/sec) may differ from CPU speed Some architectures support multiple buses CSC255-702/703 - CTI/DePaul

Example Algorithm: Add Contents of Two Memory Cells CSC255-702/703 - CTI/DePaul

Machine Instruction Types Just a few instructions are sufficient for basic operations Three main categories: Data transfer Arithmetic/Logic Control Each instruction type is represented by a bit pattern CSC255-702/703 - CTI/DePaul

Machine Instruction Format Example from Appendix C in textbook CSC255-702/703 - CTI/DePaul

Instruction Decoding Example from Appendix C in textbook CSC255-702/703 - CTI/DePaul

Instruction Decoding… Example from Appendix C in textbook CSC255-702/703 - CTI/DePaul

Machine Architectures vs Instruction Set Reduced Instruction Set Computer (RISC) Relatively few basic instructions only Complex instructions have to be implemented by using basic instructions Complex Instruction Set Computer (CISC) Large number of instructions Instructions provided for complex tasks as well as simple tasks Both used in practice RISC: Motorola/IBM PowerPC, Sun SPARC CISC: Intel CSC255-702/703 - CTI/DePaul

Data Transfer Instructions Instructions associated with the transfer of data, such as: LOAD register,address Copy bit pattern from memory cell (specified by address) to register STORE register,address Copy bit pattern from register to memory cell (specified by address) MOVE register1,register2 Copy bit pattern from register1 to register2 CSC255-702/703 - CTI/DePaul

Arithmetic/Logic Instructions Instructions associated with the arithmetic and logical manipulation of data in CPU registers, such as: ADD, SUBTRACT NEGATE (Two’s complement negation) AND, OR, XOR SHIFT, ROTATE Usually involves one or more registers CSC255-702/703 - CTI/DePaul

AND. . . Example: 1 0 0 1 1 0 1 0 1 1 0 0 1 0 0 1 1 0 0 0 1 0 0 0 CSC255-702/703 - CTI/DePaul

OR. . . Example: 1 0 0 1 1 0 1 0 1 1 0 0 1 0 0 1 1 1 0 1 1 0 1 1 CSC255-702/703 - CTI/DePaul

XOR. . . Example: 1 0 0 1 1 0 1 0 1 1 0 0 1 0 0 1 0 1 0 1 0 0 1 1 CSC255-702/703 - CTI/DePaul

Bit-Oriented Instructions AND, OR, XOR are useful in testing or changing single bits or collections of bits within a byte These operations common in communications or port-setting tasks Involve use of a mask or pattern and an input byte CSC255-702/703 - CTI/DePaul

AND with a Mask 0 0 0 0 1 1 1 1 (mask) 1 0 1 0 1 0 1 0 (input) 0 0 0 0 1 0 1 0 (result) Mask can be used to zero out or hide any desired part of a byte CSC255-702/703 - CTI/DePaul

AND in a Bit Test 0 0 0 0 1 0 0 0 (mask) 1 0 1 0 1 0 1 0 (input) 0 0 0 0 1 0 0 0 (result) Is bit 5 (from left) set to 1 in the input? AND with mask 00001000 then check to see if the result is = 00000000 CSC255-702/703 - CTI/DePaul

AND to Turn Off a Bit 1 1 1 1 0 1 1 1 (mask) 1 0 1 0 1 0 1 0 (input) 1 0 1 0 0 0 1 0 (result) Modifying a bit in a byte is possible by using AND with the appropriate mask CSC255-702/703 - CTI/DePaul

OR to Turn On a Bit 0 0 0 1 0 0 0 0 (mask) 1 0 1 0 1 0 1 0 (input) 1 0 1 1 1 0 1 0 (result) Modifying a bit in a byte is possible by using OR with the appropriate mask CSC255-702/703 - CTI/DePaul

XOR to Complement 1 1 1 1 1 1 1 1 (mask) 1 0 1 0 1 0 1 0 (input) 0 1 0 1 0 1 0 1 (result) XOR with a mask of all 1’s produces the complement of the input bit pattern CSC255-702/703 - CTI/DePaul

XOR to Get a Number’s Two’s Complement 1 1 1 1 1 1 1 1 (mask) 1 0 1 0 1 0 1 0 (input) 0 1 0 1 0 1 0 1 (result) XOR with a mask of all 1’s produces the complement of the input bit pattern Add 1 to complement of input pattern: 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 1 0 1 0 1 0 1 1 0 + Two’s complement of input 1 0 1 0 1 0 1 0 CSC255-702/703 - CTI/DePaul

Right Logical Shift 1 0 1 0 1 0 1 1 Input pattern Right shift instruction 0 is fed from left 0 1 0 1 0 1 0 1 1 The rightmost 1 is lost 0 1 0 1 0 1 0 1 Output pattern CSC255-702/703 - CTI/DePaul

Right Circular Logical Shift 1 0 1 0 1 0 1 1 Input pattern Right shift instruction 1 0 1 0 1 0 1 1 The rightmost bit moves to leftmost 1 1 0 1 0 1 0 1 Output pattern CSC255-702/703 - CTI/DePaul

Rotate Bit Pattern to Right CSC255-702/703 - CTI/DePaul

Shift Definitions Circular shifts are also called rotations Two types of shifts: left and right Logical shifts lose bits at end moved to Circular shifts circulate bits to front Arithmetic shifts preserve sign bit (don’t involve it in shifts), the most significant bit CSC255-702/703 - CTI/DePaul

Control Instructions Instructions associated with program flow control, such as: GO address JUMP address SKIP address GOIF - “GO IF (condition)” address STOP, HALT, QUIT CSC255-702/703 - CTI/DePaul

Stored-Program Concept Von-Neumann machine Program is in memory cells like data Control unit extracts instructions from memory, decodes, executes Machine language is in bit patterns Chapter 2 and Appendix C in textbook describe a simulator CSC255-702/703 - CTI/DePaul

Programs vs. Data There is no difference in appearance between programs and data Both are stored as 0’s and 1’s Both are housed in memory Who keeps track of what is what? Answer: you (the programmer) must CSC255-702/703 - CTI/DePaul

Program Execution Control Unit handles it Program Counter contains memory cell address of next instruction Instruction Register contains the current instruction (the instruction now being executed) CSC255-702/703 - CTI/DePaul

Machine Cycle Fetch Decode Execute Bring next instruction from memory to CU Increment the program counter (depending on how many bytes the instruction has) Decode Interpret instruction in instruction register Execute Activate appropriate circuitry for instruction CSC255-702/703 - CTI/DePaul

Machine Cycle CSC255-702/703 - CTI/DePaul

Machine Cycle Timing Controlled by an oscillator called “clock” Clock ticks at a very fast rate (such as 1.8GHz) Circuits in CU that actually Fetch, Decode, Execute are triggered by clock Each instruction execution might take one or more clock cycles to complete Depends on how complicated the instruction is CSC255-702/703 - CTI/DePaul

General Program Startup Program counter is initialized to 0 (points to first memory cell as place to get next instruction) Fetch brings instruction in cell 0 (the one that is currently referenced by the program Counter) to instruction register in CU Program execution starts and continues until a termination instruction (such as halt) is reached CSC255-702/703 - CTI/DePaul

How to Handle Jump (Branch/Go/Skip) Instruction? Branching instruction is interesting Basic form: jmp address All it does is put the address contained in the instruction into the Program Counter On next machine cycle, Fetch gets the instruction in the cell that the Program Counter points to CSC255-702/703 - CTI/DePaul

Simple Machine Simulator http://wwwes.cs.utwente.nl/software/simpsim Implements the machine architecture described in Brookshear Appendix C Adds a few more instructions: jumpLE,jumpEQ Supports storing data items: db Anything written to register RF is displayed on output window Supports labeling a location in code (useful for handling relocation of instructions during program edits and for jumps) Executable program is also available on Course Online (SimpSim.exe) Get this program and experiment with it to understand the basics Check the help pages and instruction formats/examples CSC255-702/703 - CTI/DePaul

Simple Machine Simulator Refer to the screen of SimpSim for the architecture description based on Appendix C and how to use the simulator There are some example programs: simpleadd.asm asciiout.asm hello.asm multiply_1.asm multiply_2.asm divide.asm CSC255-702/703 - CTI/DePaul

Example: Simple Addition Program (simpleadd.asm) ; Simple Addition Example... ; ; CSC255 - CTI/DePaul ; Ufuk Verun ; This program adds the contents of two memory cells X and Y, and ; stores the result in memory cell Z. ; A: Contents of memory cell X ; B: Contents of memory cell Y ; At the end, result=A+B is stored in memory cell Z. load R1,[X] ;Load contents of memory cell X (A) into R1 load R2,[Y] ;Load contents of memory cell Y (B) into R2 addi R1,R1,R2 ;Calculate R1=A+B store R1,[Z] ;Store the result of A+B in memory cell Z halt X: db 10 ;X is the memory address that contains 10 Y: db 20 ;Y is the memory address that contains 20 Z: db 0 ;Z is the memory address that holds result CSC255-702/703 - CTI/DePaul

Example: ASCIIOut Program (asciiout.asm) ; ASCII Output Example... ; load RF,0 ; Initialize to 0 load R7,1 ; Increment NextChar:addi RF,RF,R7 ; Increase (is written to ; RF(=screen)) jmp NextChar ; Repeat Assembled code: 00: 2F 00 02: 27 01 04: 5FF7 06: B004 CSC255-702/703 - CTI/DePaul

Example: HelloWorld Program (hello.asm) ; Hello World Example... ; ; CSC255 - CTI/DePaul ; Ufuk Verun ; This program displays a Hello World message and smiling faces... load R1,Message ; The start of the string load R2,1 ; Increment step load R0,0 ; 0 is used to identify string-terminator NextChar:load RF,[R1] ; Get character and print it on screen addi R1,R1,R2 ; Increase address jmpEQ RF=R0,Ready ; When string-terminator, then ready jmp NextChar ; Next character Ready: halt Message: db 10,10,10 db 32,32,32,32,1,32,2,32,1,32,2,32,1,10 db " Hello World !!",10 db 32,32,32,32,1,32,2,32,1,32,2,32,1 db 0 ; String-terminator CSC255-702/703 - CTI/DePaul

More Examples: divide.asm multiply_1.asm, multiply_2.asm The following additional examples are available on Course Online Make sure you understand how each one works multiply_1.asm, multiply_2.asm ; There is no multiply instruction in the architecture of Appendix C. ; This program calculates A*B by repetitive additions. ; Result is calculated by adding A B times and keeping the running result ; in register R4. ; At the end of the program, the result is stored in register R4. divide.asm ; There is no divide instruction in the architecture of Appendix C. ; This program calculates A/B by repetitive subtractions, where A and B ; are positive integers within range 1..127 (in two's complement using ; 8 bits). ; Result is calculated by subtracting B from A (as long as we can without ; going negative) ; Quotient is found by counting how many times we subtracted. ; At the end, the quotient is stored in R3, the remainder is stored in R4. ; Example: ; for A=10, B=3, we need to store R3=3, R4=1 at the end. CSC255-702/703 - CTI/DePaul

Multiple Programs in Memory Several programs can be in memory at the same time Running a program just means setting the Program Counter to point to the cell with the program’s first instruction The operating system (for example Windows XP) manages memory management and processing of programs CSC255-702/703 - CTI/DePaul