CS 140 Lecture 9 Professor CK Cheng 10/24/02. Sequential Network 1.Components F-Fs 2.Specification D Q Q’ CLK.

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CS 140 Lecture 9 Professor CK Cheng 10/24/02

Sequential Network 1.Components F-Fs 2.Specification D Q Q’ CLK

Combinational CLK A BC A typical sequential network has both a combinational and sequential part.

CLK t t t t setup t hold A B tcqtcq t C t setup - data arrive before t hold – data keep steady after T cq- data appear after rising edge of CLK

Combinational CLK A BC t cq + t comb + t setup < T t hold > t cq + t comb Clock period Shortest path

x D Q Q’ D Q y t setup = 2 t hold = 1.5 t cq = 1.7 t and, t or = 3 T = = 6.7

Netlist State Table State Diagram Input Output Relation x Q0Q0 Q1Q1 D Q Q’ D Q y Q1Q1 Q0Q0 D1D1 D0D0 y(t) = Q 1 (t)Q 0 (t) Q 0 (t+1) = D 0 (t) = x(t)Q 1 (t) Q 1 (t+1) = D 1 (t) = x(t) + Q 0 (t)

PS inputs x=0 x=1 State table 00, 0 10, 0 10, 0 00, 0 11, 0 10, 1 11, 1 Q 1 (t) Q 0 (t) Q 1 (t+1) Q 0 (t+1), y(t) s0s1s2s3s0s1s2s3 PS inputs x=0 x=1 s 0, 0 s 2, 0 s 2, 0 s 0, 0 s 3, 0 s 2, 1 s 3, 1 Let: s 0 = 00 s 1 = 01 s 2 = 10 s 3 = 11 ( Let’s remake the state table using symbols instead of binary code, e.g. ’00’)

State Diagram s1s1 s2s2 s3s3 s0s0 0,1/0 1/0 0/1 1/0 0/0 1/1 Example Run (sequence of inputs and outputs) Time Input State s 0 s 0 s 2 s 3 s 2 Output x/y