ECE 232 L9.Mult.1 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232 Hardware Organization and Design Lecture 9 Computer Arithmetic Multiplication Maciej Ciesielski

ECE 232 L9.Mult.2 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Outline °Datapath design – putting pieces together °ALU Shifters Multiplier °Floating point representation °Arithmetic and logical instructions - summary

ECE 232 L9.Mult.3 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Datapath design

ECE 232 L9.Mult.4 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Review: ALU Design °Bit-slice plus extra on the two ends °Overflow means number too large for the representation °Carry-look ahead and other adder tricks AB M S 32 4 Overflow ALU0 a0b0 cinco s0 ALU31 a31b31 cinco s31

ECE 232 L9.Mult.5 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MIPS arithmetic instructions Instruction Example MeaningComments add add $1,$2,$3$1 = $2 + $33 operands; exception possible subtractsub $1,$2,$3$1 = $2 – $33 operands; exception possible add immediateaddi $1,$2,100$1 = $ constant; exception possible add unsignedaddu $1,$2,$3$1 = $2 + $33 operands; no exceptions subtract unsignedsubu $1,$2,$3$1 = $2 – $33 operands; no exceptions add imm. unsign.addiu $1,$2, C $1 = $2 + C+ constant; no exceptions multiply mult $2,$3Hi, Lo = $2 x $364-bit signed product multiply unsignedmultu$2,$3Hi, Lo = $2 x $364-bit unsigned product divide div $2,$3Lo = $2 ÷ $3,Lo = quotient, Hi = remainder Hi = $2 mod $3 divide unsigned divu $2,$3Lo = $2 ÷ $3,Unsigned quotient & remainder Hi = $2 mod $3 move from Himfhi $1$1 = HiUsed to get copy of Hi move from Lomflo $1$1 = LoUsed to get copy of Lo

ECE 232 L9.Mult.6 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MULTIPLY (unsigned) °“Paper and pencil” example (unsigned): Multiplicand 1000 Multiplier Product °m x n bits = m + n bit product °Binary makes it easy: 0  place 0 ( 0 x multiplicand) 1  place a copy ( 1 x multiplicand) °4 versions of multiply hardware & algorithm: successive refinement

ECE 232 L9.Mult.7 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Unsigned Combinational Multiplier °Stage i accumulates A * 2 i if B i == 1 °Q: How much hardware for 32 bit multiplier? Critical path? B0B0 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 B1B1 B2B2 B3B3 P0P0 P1P1 P2P2 P3P3 P4P4 P5P5 P6P6 P7P7 0000

ECE 232 L9.Mult.8 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers How does it work? °At each stage shift A left ( x 2) °Use next bit of B to determine whether to add in shifted multiplicand °Accumulate 2n bit partial product at each stage B0B0 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 B1B1 B2B2 B3B3 P0P0 P1P1 P2P2 P3P3 P4P4 P5P5 P6P6 P7P

ECE 232 L9.Mult.9 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Unisigned shift-add multiplier (version 1) °64-bit Multiplicand reg, 64-bit ALU, 64-bit Product reg, 32-bit multiplier reg °Multiplier = datapath + control Product Multiplier Multiplicand 64-bit ALU Shift Left Shift Right Write Control 32 bits 64 bits

ECE 232 L9.Mult.10 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Multiply Algorithm Version 1 ° ProductMultiplierMultiplicand Shift the Multiplier register right 1 bit. Done Yes: 32 repetitions 2. Shift the Multiplicand register left 1 bit. No: < 32 repetitions 1. Test Multiplier0 Multiplier0 = 0 Multiplier0 = 1 1a. Add multiplicand to product & place the result in Product register 32nd repetition? Start

ECE 232 L9.Mult.11 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Observations on Multiply Version 1 °1 clock per cycle => ­ 100 clocks per multiply Ratio of multiply to add 5:1 to 100:1 °1/2 bits in multiplicand always 0  64-bit adder is wasted °0’s inserted in left of multiplicand as shifted  least significant bits of product never changed once formed °Instead of shifting multiplicand to left, shift product to right?

ECE 232 L9.Mult.12 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MULTIPLY Hardware - Version 2 °32-bit Multiplicand reg, 32 -bit ALU, 64-bit Product reg, 32-bit Multiplier reg Product Multiplier Multiplicand 32-bit ALU Shift Right Write Control 32 bits 64 bits Shift Right

ECE 232 L9.Mult.13 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers What’s going on? °Multiplicand stays still and product moves right B0B0 B1B1 B2B2 B3B3 P0P0 P1P1 P2P2 P3P3 P4P4 P5P5 P6P6 P7P A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3 A0A0 A1A1 A2A2 A3A3

ECE 232 L9.Mult.14 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Multiply Algorithm - Version 2 3. Shift the Multiplier register right 1 bit Done Yes: 32 repetitions 2. Shift the Product register right 1 bit No: < 32 repetitions 32nd repetition ? Star t Multiplier0 = 0 Multiplier0 = 1 1a. Add multiplicand to the left half of product & place the result in the left half of Product register 1. Test Multiplier0 °Product Multiplier Multiplicand

ECE 232 L9.Mult.15 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Observations on Multiply Version 2 °Product register wastes space that exactly matches size of multiplier  combine Multiplier register and Product register

ECE 232 L9.Mult.16 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MULTIPLY Hardware - Version 3 °32-bit Multiplicand reg, 32 -bit ALU, 64-bit Product reg, (0-bit Multiplier reg) Product (Multiplier) Multiplicand 32-bit ALU Write Control 32 bits 64 bits Shift Right

ECE 232 L9.Mult.17 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Multiply Algorithm - Version 3 MultiplicandProduct Done Start Yes: 32 repetitions 2. Shift the Product register right 1 bit. No: < 32 repetitions 1. Test Product Product0 = 0Product0 = 1 1a. Add multiplicand to the left half of product & place the result in the left half of Product register 32nd repetition?

ECE 232 L9.Mult.18 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Observations on Multiply Version 3 °2 steps per bit because Multiplier & Product are combined °MIPS registers Hi and Lo are left and right half of Product °Gives us MIPS instruction multu (multiply unsigned) °How can you make it faster? °What about signed multiplication? easiest solution is to make both positive & remember whether to complement product when done (leave out the sign bit, run for 31 steps) apply definition of 2’s complement -need to sign-extend partial products and subtract at the end Booth’s Algorithm is elegant way to multiply signed numbers using same hardware as before and save cycles -can handle multiple bits at a time

ECE 232 L9.Mult.19 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Motivation for Booth’s Algorithm °Example: 2 x 6 = 0010 x 0110 : 0010 x shift (0 in multiplier) add (1 in multiplier) add (1 in multiplier) shift (0 in multiplier) °ALU with add or subtract gets same result in more than one way: 6= – = – = °For example 0010 x shift (0 in multiplier) – 0010 sub (first 1 in multpl) 0000 shift (mid string of 1s) add (prior step had last 1)

ECE 232 L9.Mult.20 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Booth’s Algorithm Current BitBit to the RightExplanationExampleOp 1 0Begins run of 1s sub 1 1Middle of run of 1s none 0 1End of run of 1s add 0 0Middle of run of 0s none °Originally for speed (when shift was faster than add) °Replace a string of 1s in multiplier with an initial subtract when we first see a one and then later add for the bit after the last one beginning of runend of run middle of run –

ECE 232 L9.Mult.21 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Booths Example (2 x 7) 0. Initial value  sub 1a. P = P - m shift P (sign ext) 1b > nop, shift > nop, shift > add 4a shift 4b done OperationMultiplicand Productnext?

ECE 232 L9.Mult.22 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Booths Example (2 x -3) 1a. P = P - m shift P (sign ext) 1b  add a shift P 2b  sub a shift 3b  nop 4a shift 4b done OperationMultiplicandProductnext? 0. initial value > sub

ECE 232 L9.Mult.23 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers MIPS logical instructions Instruction Example MeaningComment and and $1,$2,$3$1 = $2 & $33 reg. operands; Logical AND oror $1,$2,$3$1 = $2 | $33 reg. operands; Logical OR xorxor $1,$2,$3$1 = $2  $33 reg. operands; Logical XOR nornor $1,$2,$3$1 = ~($2 |$3)3 reg. operands; Logical NOR and immediateandi $1,$2,10$1 = $2 & 10Logical AND reg, constant or immediateori $1,$2,10$1 = $2 | 10Logical OR reg, constant xor immediate xori $1, $2,10 $1 = ~$2 &~10Logical XOR reg, constant shift left logicalsll $1,$2,10$1 = $2 << 10Shift left by constant shift right logicalsrl $1,$2,10$1 = $2 >> 10Shift right by constant shift right arithm.sra $1,$2,10$1 = $2 >> 10Shift right (sign extend) shift left logicalsllv $1,$2,$3$1 = $2 << $3 Shift left by variable shift right logicalsrlv $1,$2, $3 $1 = $2 >> $3 Shift right by variable shift right arithm.srav $1,$2, $3 $1 = $2 >> $3 Shift right arith. by variable

ECE 232 L9.Mult.24 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Shifters Two kinds of shifters: logical - value shifted in is always "0" arithmetic - on right shifts, sign extend msblsb"0" msblsb"0" Note: these are single bit shifts. A given instruction might request 0 to 32 bits to be shifted!

ECE 232 L9.Mult.25 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Combinational Shifter from MUXes °What comes in the MSBs? °How many levels for 32-bit shifter? °What if we use 4-1 Muxes ? 1 0 sel A B D Basic Building Block 8-bit right shifter S 2 S 1 S 0 A0A0 A1A1 A2A2 A3A3 A4A4 A5A5 A6A6 A7A7 R0R0 R1R1 R2R2 R3R3 R4R4 R5R5 R6R6 R7R7

ECE 232 L9.Mult.26 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers General Shift Right Scheme - 16 bit example If added Right-to-left connections could support Rotate (not in MIPS but found in ISAs)

ECE 232 L9.Mult.27 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Funnel Shifter °Shift A by i bits (sa= shift right amount) °Logical: Y = 0, X=A, sa = i °Arithmetic? Y = _, X=_, sa= __ °Rotate? Y = _, X=_, sa= __ °Left shifts? Y = _, X=_, sa= __ Instead extract 32 bits of 64. R XY Shift Right 32 Y X R

ECE 232 L9.Mult.28 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers Barrel Shifter Technology-dependent solutions: transistor per switch