Address Decoders Lecture L6.10 Section 6.3. MOUSE Layout PROM 2716 RAM 6810 MPU 6802 PIA 6821 Address Bus (16 lines) Data Bus (8 lines) To outside world.

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Presentation transcript:

Address Decoders Lecture L6.10 Section 6.3

MOUSE Layout PROM 2716 RAM 6810 MPU 6802 PIA 6821 Address Bus (16 lines) Data Bus (8 lines) To outside world cs Address Decoder PIA RAM2 PROM

MOUSE Memory Map RAM1 (internal) F RAM FF PROMB800-BFFF PIA Device Hex Address

System layout work sheet A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAM X X X X X X X F RAM X X X X X X X FF PROM X X X X X X X X X X X B800-BFFF PIA X X

System layout work sheet A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 RAM X X X X X X X F RAM X X X X X X X FF PROM X X X X X X X X X X X B800-BFFF PIA X X Don’t cares PIA FUse A7-A15 as inputs to address decoder

MODULE addecode TITLE 'Address Decoder' DECLARATIONS " INPUT PINS " A15,A14,A13,A12,A11,A10,A9,A8,A7 pin; " OUTPUT PINS " RAM1,RAM2,PROM,PIA pin istype 'com'; H,L,X = 1,0,.X.; Address = [A15,A14,A13,A12,A11,A10,A9,A8,A7,X,X,X,X,X,X,X]; EQUATIONS RAM1 = (Address <= ^h007F); RAM2 = (Address >= ^h0080) & (Address <= ^h00FF); PROM = (Address >= ^hB800) & (Address <= ^hBFFF); PIA = (Address >= ^h8000) & (Address <= ^h807F); addecode.abl

test_vectors (Address -> [RAM1,RAM2,PROM,PIA]) ^h0000 -> [ H, L, L, L ]; ^h004A -> [ H, L, L, L ]; ^h0080 -> [ L, H, L, L ]; ^h00DF -> [ L, H, L, L ]; ^hB800 -> [ L, L, H, L ]; ^hBDF0 -> [ L, L, H, L ]; ^h8000 -> [ L, L, L, H ]; ^h8002 -> [ L, L, L, H ]; end addecode.abl (cont.)