Lecture 9, Slide 1EECS40, Fall 2004Prof. White Lecture #9 OUTLINE –Transient response of 1 st -order circuits –Application: modeling of digital logic gate Reading Chapter 4 through Section 4.3

Lecture 9, Slide 2EECS40, Fall 2004Prof. White Transient Response of 1 st -Order Circuits In Lecture 8, we saw that the currents and voltages in RL and RC circuits decay exponentially with time, with a characteristic time constant , when an applied current or voltage is suddenly removed. In general, when an applied current or voltage suddenly changes, the voltages and currents in an RL or RC circuit will change exponentially with time, from their initial values to their final values, with the characteristic time constant  : where x(t) is the circuit variable (voltage or current) x f is the final value of the circuit variable t 0 is the time at which the change occurs

Lecture 9, Slide 3EECS40, Fall 2004Prof. White Procedure for Finding Transient Response 1.Identify the variable of interest For RL circuits, it is usually the inductor current i L (t) For RC circuits, it is usually the capacitor voltage v c (t) 2.Determine the initial value (at t = t 0 + ) of the variable Recall that i L (t) and v c (t) are continuous variables: i L (t 0 + ) = i L (t 0  ) and v c (t 0 + ) = v c (t 0  ) Assuming that the circuit reached steady state before t 0, use the fact that an inductor behaves like a short circuit in steady state or that a capacitor behaves like an open circuit in steady state

Lecture 9, Slide 4EECS40, Fall 2004Prof. White Procedure (cont’d) 3.Calculate the final value of the variable (its value as t  ∞ ) Again, make use of the fact that an inductor behaves like a short circuit in steady state ( t  ∞) or that a capacitor behaves like an open circuit in steady state ( t  ∞) 4.Calculate the time constant for the circuit  = L/R for an RL circuit, where R is the Thévenin equivalent resistance “seen” by the inductor  = RC for an RC circuit where R is the Thévenin equivalent resistance “seen” by the capacitor

Lecture 9, Slide 5EECS40, Fall 2004Prof. White Example: RL Transient Analysis Find the current i(t) and the voltage v(t) : t = 0 i +v–+v– R = 50  V s = 100 V ++ L = 0.1 H 1. First consider the inductor current i 2. Before switch is closed, i = 0 --> immediately after switch is closed, i = 0 3. A long time after the switch is closed, i = V s / R = 2 A 4. Time constant L/R = (0.1 H)/(50  ) = seconds

Lecture 9, Slide 6EECS40, Fall 2004Prof. White t = 0 i +v–+v– R = 50  V s = 100 V ++ L = 0.1 H Now solve for v(t), for t > 0 : From KVL, = 100e -500t volts`

Lecture 9, Slide 7EECS40, Fall 2004Prof. White Example: RC Transient Analysis Find the current i(t) and the voltage v(t) : t = 0 i +v–+v– R 2 = 10 k  V s = 5 V ++ C = 1  F 1. First consider the capacitor voltage v 2. Before switch is moved, v = 0 --> immediately after switch is moved, v = 0 3. A long time after the switch is moved, v = V s = 5 V 4. Time constant R 1 C = (10 4  )(10 -6 F) = 0.01 seconds R 1 = 10 k 

Lecture 9, Slide 8EECS40, Fall 2004Prof. White t = 0 i +v–+v– R 2 = 10 k  V s = 5 V ++ C = 1  F R 1 = 10 k  Now solve for i(t), for t > 0 : From Ohm’s Law, A = 5 x e -100t A

Lecture 9, Slide 9EECS40, Fall 2004Prof. White

Lecture 9, Slide 10EECS40, Fall 2004Prof. White

Lecture 9, Slide 11EECS40, Fall 2004Prof. White When we perform a sequence of computations using a digital circuit, we switch the input voltages between logic 0 (e.g., 0 Volts) and logic 1 (e.g., 5 Volts). The output of the digital circuit changes between logic 0 and logic 1 as computations are performed. Application to Digital Integrated Circuits (ICs)

Lecture 9, Slide 12EECS40, Fall 2004Prof. White Every node in a real circuit has capacitance; it’s the charging of these capacitances that limits circuit performance (speed) We compute with pulses. We send beautiful pulses in: But we receive lousy-looking pulses at the output: Capacitor charging effects are responsible! time voltage time voltage Digital Signals

Lecture 9, Slide 13EECS40, Fall 2004Prof. White Circuit Model for a Logic Gate Recall (from Lecture 1) that electronic building blocks referred to as “logic gates” are used to implement logical functions (NAND, NOR, NOT) in digital ICs –Any logical function can be implemented using these gates. A logic gate can be modeled as a simple RC circuit: + V out – R V in (t) ++ C switches between “low” (logic 0) and “high” (logic 1) voltage states

Lecture 9, Slide 14EECS40, Fall 2004Prof. White Transition from “0” to “1” (capacitor charging) time V out 0 V high RC 0.63V high V out V high time RC 0.37V high Transition from “1” to “0” (capacitor discharging) (V high is the logic 1 voltage level) Logic Level Transitions 0

Lecture 9, Slide 15EECS40, Fall 2004Prof. White What if we step up the input, wait for the output to respond, then bring the input back down? time V in 0 0 time Vin 0 0 Vout time Vin 0 0 Vout Sequential Switching

Lecture 9, Slide 16EECS40, Fall 2004Prof. White The input voltage pulse width must be large enough; otherwise the output pulse is distorted. (We need to wait for the output to reach a recognizable logic level, before changing the input again.) Time Vout Pulse width = 0.1RC Time Vout Time Vout Pulse Distortion + V out – R V in (t) C +–+– Pulse width = 10RCPulse width = RC

Lecture 9, Slide 17EECS40, Fall 2004Prof. White V in R V out C Suppose a voltage pulse of width 5  s and height 4 V is applied to the input of this circuit beginning at t = 0: R = 2.5 kΩ C = 1 nF First, V out will increase exponentially toward 4 V. When V in goes back down, V out will decrease exponentially back down to 0 V. What is the peak value of V out ? The output increases for 5  s, or 2 time constants.  It reaches 1-e -2 or 86% of the final value x 4 V = 3.44 V is the peak value Example  = RC = 2.5  s

Lecture 9, Slide 18EECS40, Fall 2004Prof. White V out (t) = 4-4e -t/2.5  s for 0 ≤ t ≤ 5  s 3.44e -(t-5  s)/2.5  s for t > 5  s {

Lecture 9, Slide 19EECS40, Fall 2004Prof. White