7.4 Clocked Synchronous State-Machine Analysis Introduction The goal of a sequential circuit analysis is to determine the next-state and output functions so that the behavior of a circuit can be predicted. In this section, we will discuss how to analyze a clocked synchronous state-machine. It’s one of the main emphases in this course. Turn-the-crank The characteristic is that the steps for analyzing a clocked synchronous state-machine are almost the same. So, it will become very simple if we have learned the basic principles. Return Next

7.4 Clocked Synchronous State-Machine Analysis Specialized Words flip-flop 触发器 excitation equation 激励（驱动）方程 transition/state equation 转移/状态方程 output equation 输出方程 characteristic equation 特性（征）方程 transition table 转换表 state table 状态表 state/output table 状态/输出表 state diagram 状态图 Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Review 1. What are the two types the state-machine structure include? What characteristic does it have for each one? Mealy machine Moore machine Z = G (Q n, X ) Z = G (Q n) 2. What are the excitation equation, transition equation, and output equation ? Output equation Excitation equation Transition equation Next-state logic F State memory input W Output logic G Return Back Next

7.4 Clocked Synchronous State-Machine Analysis 3. Please write the characteristic equations of D flip-flop and J-K flip-flop. D flip-flop Qn+1= D J-K flip-flop Qn+1= J·Qn+K·Qn 7.4.1 Analysis of State Machines with D Flip-Flops The analysis has three basic steps: 1. Determine the next-state and output functions F and G. 2. Use F and G to construct a state/output table that completely specifies the next state and output of the circuit for every possible combination of current state and input. Return Back Next

7.4 Clocked Synchronous State-Machine Analysis 3. Draw a state diagram that presents the inform-ation from the previous step in graphical form. Q0 Q1 D0 D1 Example I MAX=Q1·Q0·EN Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Excitation equations Transition equations How can we obtain the transition equations from the excitation equations? Output equation MAX=Q1·Q0·EN Return Back Next

7.4 Clocked Synchronous State-Machine Analysis 1 0 0 0 1 1 0 1 1 Q1 Q0 Transition/output table EN 1 S0 S1 S2 S3 S State/output table EN S1 S2 1 1 1 MAX=Q1·Q0·EN Return Back Next

7.4 Clocked Synchronous State-Machine Analysis 1 S0 S1 S2 S3 S State/output table EN S1 S2 S0 S1 S2 S3 1/0 0/0 State diagram 1/1 S EN/MAX What is the function of the logic circuit ? It’s a modulo-4 2-bit binary counter with enable. Simulation Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Example II Q0 Q1 Q2 D0 D1 D2 Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Excitation equations Transition equations Output equation Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Transition/output table 0 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 1 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Q2Q1Q0 0 0 XY 1 0 0 1 1 0 1 1 1 0 Z1Z2 Return Back Next

7.4 Clocked Synchronous State-Machine Analysis State/output table s0 s1 s2 s3 s4 s5 s6 s7 S 00 XY Z1Z2 1 0 0 0 1 1 01 11 10 State diagram S0 S1 S3 S2 1x/10 0x/10 S XY/Z1Z2 S5 S6 S7 S4 1x/00 01/10 xx/11 0x/00 00/10 xx/10 Simulation Return Back Next

7.4 Clocked Synchronous State-Machine Analysis 7.3.3 Analysis of State Machines with J-K Flip-Flops Q0 Q1 Q2 J0 J1 J2 K0 K1 K2 Excitation equations Transition equations Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Transition/output table 0 0 1 0 1 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Q2 Q1 Q0 1 C State diagram Q2Q1Q0 /C 000 001 010 011 100 111 110 101 /1 /0 Simulation Return Back Next

7.4 Clocked Synchronous State-Machine Analysis Summary The detailed steps for analyzing a clocked synchronous state machine are as follows: 1. Determine the excitation equations. 2. Determine the transition equations. 3. Determine the output equations. 4. To construct a transition/output table. 5. To construct a state/ output table. 6. (Optional) Draw a state diagram. Exercises P647~649 7.9, 7.15, 7.16, 7.17, 7.18, 7.19 Return Back