WELCOME TO Boolean Algebra By VINAY ALEXANDER PGT(CS) KV, JHAGRAKHAND

=>INDEX: Development of Boolean Algebra Binary Valued Quantities Logical Operation Basic Logic Gates Basic Theorems of Boolean Algebra

Development of Boolean Algebra: 1. Aristotle wrote six works on the subject of man’s reasoning. 2. For centuries no body could solve these problem logically. 3. In 1854 Mr. Boole published a paper called “An Investigation of the laws of the thought”. In this paper Boole used his own algebra called Boolean Algebra to solve the problems proposed by Aristotle. 4. Boole’s work was used in 1938 by Mr. Claude E. Shannon in his paper titled “A symbolic Analysis of Relay Switching Circuits”. In this paper he solved relay logic problems using Boolean algebra. After his effort the Boolean algebra also called circuit algebra.

Binary Valued Quantities: Any Question whose answer is either yes or no is called Binary valued quantity. The decision which results in either YES (True) or NO (False) is called Boolean Decision. Examples 1. Delhi is the capital of India. True 2. Jaipur is the capital of Punjab. False 3. USA is a neighboring country of India. False 4. Thar desert is in the state of Rajasthan. True 5. What is your name? Not a binary valued quantity 6. What is the capital of the state of UP? Not a binary valued quantity

1. Logical Function or compound Statement 2. Logical Operator Logical Operation 1. Logical Function or compound Statement 2. Logical Operator 3. Evaluation of Boolean Expressions Using Truth Table. Logical Function or compound Statement: An Algebraic variables are combined together with the help of mathematic operator. This combination is called the algebraic expression. Similarly, Boolean variables are combined together with the help of Logical operator or Boolean operator. These expressions are called Logical Function or Compound Statements. Example: X NOT Y OR Z

Logical Operators: Truth Table: Truth table is a table which represents all the possible values of logical variables/statements along with all the possible results of the given combination of values. X Y X or Y X and Y not X 0 0 0 0 1 0 1 1 0 1 0 1 0 0 1 1 1 1 0

Truth Table: NOT, OR and AND operator What is Tautology and Fallacy ? If result of any logical statement or expression is always TRUE or 1, it is called Tautology and if the result is always FALSE or 0 it is called Fallacy. Logical operators 1. NOT operator 2. OR operator 3. AND operator Truth Table: NOT, OR and AND operator X Y X’ (NOT) X+Y(OR) X.Y (AND) 1

NOT operator: This operator operates on single variable and operation performed by NOT operator is called complementation and the symbols is(BAR). Thus ē means complement of e. NOT is denoted by an overbar ( ¯ ), a single quote mark (') after, or (~) before the variable. A Ā 1

OR operator: it is also known as logical addition and denoted by + OR operator: it is also known as logical addition and denoted by +.it work on two variable. If any one variable is true then the result will be true otherwise result will be false. X Y X OR Y 1 0+0=0 0+1=1 1+0=1 1+1=1

AND operator: it is also known as logical multiplication and is denoted by a dot (·). it work on two variable. If both the variable is true then the result will be true otherwise result will be false. NOTE: A truth table of n input variables with have 2n input combinations.i.e. 2n rows.i.e. 4-variable truth table will have 24 .i.e. 16 rows in it X Y X.Y 1 0.0=0 0.1=0 1.0=0 1.1=1

Evaluation of Boolean Expressions Using TT Y X+Y (X+Y)` X` Y` X`Y` 1

BASIC LOGIC GATES: A Gate is a basic electronic circuit which operates on one or more signals to produce an output signal. Gates are digital (two-state) circuit because the input and output signals are either low voltage (denotes 0) or high voltage (denotes 1) .Gates are often called logic circuits because they can be analyzed with Boolean algebra. There are three types of logic gates. 1. INVERTOR(NOT gate) 2. OR gate 3. AND gate

NOT Gate/INVERTOR A NOT gate accepts one input value and produces one output value. The output value is always the opposite of the input state. Figure 4.1 Various representations of a NOT gate

By definition, if the input value for a NOT gate is 0, the output value is 1, and if the input value is 1, the output is 0 A NOT gate is sometimes referred to as an inverter because it inverts the input value

OR GATE The OR Gate has two or more input signals but only one output signal. If any of the input values are true(1), the output value is true(1). otherwise, the output is False(0)

Three input OR GATE F=X+Y+Z 1

AND Gate The NOT Gate has two or more than two input signals and produce only one output signal. when all the input values are true(1), then the output value is true(1). otherwise, the output is False(0).

Three input AND GATE F= X. Y. Z 1

Basic Postulates of Boolean Algebra if X ≠ 0 then X=1; and if X≠1 then X=0 OR relations 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 1 AND relations 0 . 0 = 0 0 . 1 = 0 1 . 0 = 0 1 . 1 = 1

Principle of Duality 1. Changing each OR sign(+) to an AND sign(.) 2. Changing each AND(.) sign to an OR sign(+) 3. Replacing each 0 by 1 and 0 to 1. Example: If exp is 0 + 0 = 0 then 1 . 1 = 1

Basic Theorems of Boolean Algebra: Invented by George Boole in 1854 1. Properties of 0 and 1 (a) 0 + x = x (b) 1 + x = 1 (c) 0. x = 0 (d) 1 . x = x Indempotence Law x + x = x x . x = x Involution ( x` `) = x Complementarity Law x + x` = 1 x . x` = 0 In Boolean Algebra, if an expression holds true then its dual is also true and vice-versa

x + x ` y = x + y (3rd distributive law) Absorption Law (a) X+XY =X 5. Commutative Law x + y = y + x x . y = y . X Associative Law x + ( y + z ) = ( x + y ) + z x ( y . z ) = ( x . y ) z Distributive Law x ( y + z ) = x . y + x . z x + ( y . z ) = ( x + y ) . ( x + z ) x + x ` y = x + y (3rd distributive law) Absorption Law (a) X+XY =X (b) X(X+Y)=X

Boolean Algebra Invented by George Boole in 1854 An algebraic structure defined by a set B = {0, 1}, together with two binary operators (+ and ·) and a unary operator ( ) X + 0 = + 1 X + X X = X Identity element 1. 3. 5. 7. 9. 2. 4. 6. 8. X . 1 = . 0 X . X Idempotence Complement Involution 10. 12. 14. 16. X + Y Y + X = (X + Y) Z + X + (Y Z) X(Y + XY XZ X . Y 11. 13. 15. 17. XY YX = (XY) Z X(Y Z) X + YZ (X + Y) (X + Z) X . Y X + Y Commutative Associative Distributive DeMorgan ’ s Boolean Algebra and Logic Gates 23 23

DeMorgan’s 1st Theorem It states that ( x + y ) ` = x ` . y ` x + x` = 1 x . x` =0 complementarity Law Let p = x + y p + p` = 1 and p . p` = 0 1st Part-- ( x + y ) + ( x` . y` ) = 1 LHS => ( ( x + y) + x` ) . ( ( x + y) + y`) Distributive law ( x + y + x` ) . ( x + y + y`) ( 1 + y ) . ( x + 1) x + x` = 1 1 . 1 1 + x = 1 1 RHS

DeMorgan’s 1st Theorm 2nd Part ( x + y ) . x`. y` = 0 LHS x`. y` . ( x + y ) x ( y z ) = ( x y ) z x`. y`. x + x` . y`. y x ( y + z) = x . y + x . Z x . x` .y` + x`. y. y` 0 . y + x` . 0 x. x` = 0 0 + 0 0 RHS

DeMorgan’s 2nd Theorm x + x ` = 1 x . x` =0 complementarity Law Let This theorem states that: ( x . y )` = x ` + y ` x + x ` = 1 x . x` =0 complementarity Law Let x + x ` = 1 and x . x ` = 0 1st Part-- (a) ( x . y ) + ( x` + y` ) = 1 LHS x. y + ( x` + y`) (x` + y`) + x. y x + y = y + x (x` + y` + x ) . (x` + y` + y) (x +y) (x+ z) = x + y. z (x + x` + y`) . ( x` + y + y`) (1 + y`) . ( x` + 1) x + x` = 1 1 . 1 1 + x = 1 1 RHS

DeMorgan’s 2nd Theorm 2nd Part ( x y ) . ( x` + y`) = 0 LHS x . y . ( x` + y` ) x ( y z ) = ( x y ) z x . y. x` + x . y. y` x ( y + z) = x . y + x . Z x` . x .y + x. y`. y 0 . y + x . 0 x. x` = 0 0 + 0 0 RHS

DEMORGANIZATION: 1. Complement the entire function 2. Change all the ANDs(.) to ORs(+) and all the ORs(+) to ANDs(.) 3. Complement each of the individual variable. Note: Break the line, change the sign to demorganize a Boolean expression.

Useful Theorems Minimization X Y + X Y = Y Absorption X + X Y = X Simplification X + X Y = X + Y DeMorgan’s X + Y = X · Y Minimization (dual) (X+Y)(X+Y) = Y Absorption (dual) X · (X + Y) = X Simplification (dual) X · (X + Y) = X · Y DeMorgan’s (dual) X · Y = X + Y Boolean Algebra and Logic Gates 29

Truth Table to Verify De Morgan’s X + Y = X · Y X · Y = X + Y X Y X·Y X+Y X · Y 1 We can also use algebraic properties in doing this proof. We will show that, x’ . y’, satisfies the definition of the complement of (x + y), defined as (x + y)’ by DeMorgan’s Law. To show this we need to show that A + A’ = 1 and A.A’ = 0 with A = x + y and A’ = x’. y’. This proves that x’. y’ = (x + y)’. Part 1: Show x + y + x’. y’ = 1. x + y + x’. y’ = (x + y + x’) (x + y + y’) X + YZ = (X + Y)(X + Z) (Distributive Law) = (x + x’ + y) (x + y + y’) X + Y = Y + X (Commutative Law) = (1 + y)(x + 1) X + X’ = 1 = 1 . 1 1 + X = 1 = 1 1 . X = 1 Part 2: Show (x + y) . x’. y’ = 0. (x + y) . x’. y’ = (x . x’. y’ + y . x’. y’) X (Y + Z) = XY + XZ (Distributive Law) = (x . x’. y’ + y . y’ . x’) XY = YX (Commutative Law) = (0 . y’ + 0 . x’) X . X’ = 0 = (0 + 0) 0 . X = 0 = 0 X + 0 = X (With X = 0) Based on the above two parts, x’y’ = (x + y)’ The second DeMorgans’ law is proved by duality. Note that DeMorgan’s Law, given as an identity is not an axiom in the sense that it can be proved using the other identities. Generalized DeMorgan’s Theorem: X1 + X2 + … + Xn = X1 · X2 · … · Xn X1 · X2 · … · Xn = X1 + X2 + … + Xn Boolean Algebra and Logic Gates 30 30

Minterms Boolean expressions which consist of a single variable or its complement. i.e. X OR Y or are known as Literal. Minterms are AND terms with every variable present in either true or complemented form. Given that each binary variable may appear normal (e.g., x) or complemented (e.g., ), there are 2n minterms for n variables. Example: Two variables (X and Y) produce 2 x 2 = 4 combinations: (both normal) (X normal, Y complemented) (X complemented, Y normal) (both complemented) Thus there are four minterms of two variables. Z x Y X XY X Y Boolean Algebra and Logic Gates 31 31

Derivation of Boolean Expression Minterms : It is a product of all the literals within the logic systems. Steps: Convert the given expression in sum of product form. If any variable is missing multiply with 1 and replace with (missing term + missing term`) factor.( if Y is missing, multiply with Y+Y’) Expand the expression Remove all duplicate terms and we will have minterm form.

Example x + y x + y = x . 1 + y . 1 x + x` =1 x. ( y + y`) + y. ( x + x`) x. y + x. y` + y. x + y. x` x. y + x . y` + y. x` x . x = x ANS.

Shorthand minterm Notation: All the letters(2 in case of 2 variable expression, 3 in case of 3 variable expression) must appear in every product, a shorthand notation has been developed that saves writing down the letters theme self. The following steps are to be followed First of all, copy of original term Substitute 0’s for barred letter and 1’s for nonbarred letters. Express the decimal equivalent of binary word as a subscript of m

Example: TO find the minterm designation of XY’Z’. Solution: 1. copy of original form=XY’Z’. 2. Substitute 0’s for barred letter and 1’s for nonbarred letters Thus binary equivalent will be 100. Decimal equivalent of100=1*22 +0*21+0*20 =4 3. Express as decimal subscript of m=m4; Thus XY’Z’=m4

Maxterms Maxterms are OR terms with every variable in true or complemented form. Given that each binary variable may appear normal (e.g., x) or complemented (e.g., x), there are 2n maxterms for n variables. Example: Two variables (X and Y) produce 2 x 2 = 4 combinations: (both normal) (x normal, y complemented) (x complemented, y normal) (both complemented) Y X + Boolean Algebra and Logic Gates 36 36

Derivation of Boolean Expression Maxterms : It is a sum of all the literals within the logic systems. Steps: Convert the given expression in product of sum form. If any variable is missing sum with 0 and replace with (missing term . missing term`) factor. Expand the expression Remove all duplicate terms and we will have maxterms form.

Example x . y x . y = (x + 0 ). ( y + 0 ) x . x` =0 ( x + ( y . y`) ) . ( y + ( x . x`) ) (x + y ) . ( x + y`) . ( y + x ) . ( y + x`) (x + y ) . ( x + y`) . ( y + x`) x + x = x ANS.

Minterms & Maxterms for 2 variables Two variable minterms and maxterms. The minterm mi should evaluate to 1 for each combination of x and y. The maxterm is the complement of the minterm x y Index Minterm Maxterm m0 = x y M0 = x + y 1 m1 = x y M1 = x + y 2 m2 = x y M2 = x + y 3 m3 = x y M3 = x + y Boolean Algebra and Logic Gates 39 39

Minterms & Maxterms for 3 variables M3 = x + y + z m3 = x y z 3 1 M4 = x + y + z m4 = x y z 4 M5 = x + y + z m5 = x y z 5 M6 = x + y + z m6 = x y z 6 y x z M7 = x + y + z m7 = x y z 7 M2 = x + y + z m2 = x y z 2 M1 = x + y + z m1 = x y z M0 = x + y + z m0 = x y z Maxterm Minterm Index Maxterm Mi is the complement of minterm mi Mi = mi and mi = Mi Boolean Algebra and Logic Gates 40

Purpose of the Index Minterms and Maxterms are designated with an index The index number corresponds to a binary pattern The index for the minterm or maxterm, expressed as a binary number, is used to determine whether the variable is shown in the true or complemented form For Minterms: ‘1’ means the variable is “Not Complemented” and ‘0’ means the variable is “Complemented”. For Maxterms: ‘0’ means the variable is “Not Complemented” and ‘1’ means the variable is “Complemented”. Boolean Algebra and Logic Gates 41 41

Standard Order All variables should be present in a minterm or maxterm and should be listed in the same order (usually alphabetically) Example: For variables a, b, c: Maxterms (a + b + c), (a + b + c) are in standard order However, (b + a + c) is NOT in standard order (a + c) does NOT contain all variables Minterms (a b c) and (a b c) are in standard order However, (b a c) is not in standard order (a c) does not contain all variables 42

Canonical Expression Boolean Expression composed entirely either of minterms or maxterms is referred as canonical expression. Sum-of-Product (SOP) or Sum-of-Minterm (SOM) When a boolean expression is represented purely as sum of minterms. Product-of-sum (POS) or Product-of-Maxterm (POM) When a boolean expression is represented purely as product of maxterms.

Sum of Products(S-O-P): A logical Expression is derived from two sets of known values. Various possible input values The derived output values for each of the input combinations. The relationship between inputs and output is to be as follows: (i).when X=0

X Y OUTPUT(Z) Product Term 1 X+Y’

Sum-Of-Minterm (SOM) Sum-Of-Minterm (SOM) canonical form: Sum of minterms of entries that evaluate to ‘1’ x y z F Minterm 1 m1 = x y z m6 = x y z m7 = x y z Focus on the ‘1’ entries F = m1 + m6 + m7 = ∑ (1, 6, 7) = x y z + x y z + x y z

Canonical Expression of x, y and z Product term/ minterm 1 x`y`z` x`y`z x`yz` x`yz xy`z` xy`z xyz` xyz Sum-of-Product (SOP) x`y`z + x`yz + xy`z` = F Product-of-sum (POS) (x`+ y`+ z`) . ( x`+ y +z) . ( x+ y`+ z) . (x + y+ z`) . ( x+ y+ z) = T

Minimization of Boolean Expression Algebraic Method. Karnaugh Map ( K-Map):It is a graphical display of the fundamental products in a truth table. K-Maps are sometimes also called VEITCH DIAGRAM. It is a pictorial form of a truth table and could handle up to 6 variables. It is used to reduce or simplify a Boolean function. It is an array of cells/squares in which each cell represents a binary value of the input variables.

GENERALIZATION: MAP SET-UP: =>The number of cell/square in a K-map is equal to 2n where n is the number of input variables. =>The map is drawn to show the relationship between squares and input variables. Variables are assigned to row and column. Binary marking are placed in each row and column using reflected code sequence. =>Each cell in the map represents a combination of input variables in a given truth table.

SUM OF PRODUCTS REDUCTION USING KARNAUGH MAP: .In s-o-p reduction each square of k map represents a minterm of the given function .for a function of n variables , there would be map of 2 n square. Each representing a minterm. => TO reduce an expression , adjacent 1’s are encircled. If two adjacent 1’s are encircled ,it makes a pair. If four adjacent 1’s are encircled ,it makes a quad. and If eight adjacent 1’s are encircled ,it makes a octet

Gray code: Gray code is a binary value encoding in which adjacent values only differ by one bit. 2‐bit Gray Code 00 01 11 10

When we plot a function, we put a 1 in each square corresponding to a minterm that is included in the function, and put a 0 in or leave blank those squares not included in the function.

=>Pair Reduction Rule: Remove the variable which changes it state from complemented to uncomplemented or vice versa. =>Quad Reduction Rule: Remove the two variable which changes their states. =>octet Reduction Rule: Remove the three variable which changes their states.

Map Rolling: If its left edges are touching the right edges and top edges are touching bottom edges. An in opposite edges squares and in corner squares only one variable changes its state from complemented to uncomplemented state or vice versa.

OVERLAPING GROUP: overlapping means same 1 can be encircled more than once.

Reduntant group: It is group whose all 1’s are overlapped by their group. Thus Reduntant group must be removed. NOTE: in pos ,complemented letter represent 1’s and uncompleted letters represent 0’s where it is just the opposite in sop map.

Maxterm(POS): In maxterm , complemented letters represent 1’s and uncomplemented letters represent 0’s. Rule to map pos Boolean expression: Prepare the truth table for a given function. 2. Draw an empty k-map for given function. 3. Map the given function by entering 0’s for outputs as 0 in the corresponding squares. 4. Enter 1’s in all left out empty squares. 5. Encircle adjacent 0’s in the form of pair, quad, and octet. Do not forget to roll the map and overlap. 6. Remove reduntant group if any. 7. Write the reduced expression for all the groups and AND(.) them.

Groupings Grouping a pair of adjacent 1’s eliminates the variable that appears in complemented and uncomplemented form. Grouping a quad of 1’s eliminates the two variables that appear in both complemented and uncomplemented form. Grouping an octet of 1’s eliminates the three variables that appear in both complemented and uncomplemented form, etc…..

Three Variable Design Example #1 1 M K J L J K 1 2 3 6 7 4 5 1 J L J K J K L M = F(J,K,L) = J L + J K + J K L

Three Variable Design Example #2 C 1 Z B A B C C A B 1 2 3 6 7 4 5 1 A C Z = F(A,B,C) = A C + B C

Three Variable Design Example #3 C 1 F2 B A A B C A C 1 A B 1 3 2 4 5 7 6 B C B C F2 = F(A,B,C) = B C + B C + A B F2 = F(A,B,C) = B C + B C + A C

Four Variable K-Map W X Y Z 1 Z 1 F1 Y X W minterm 0  minterm 1  1 F1 Y X W minterm 0  minterm 1  minterm 2  minterm 3  minterm 4  minterm 5  minterm 6  minterm 7  minterm 8  minterm 9  minterm 10  minterm 11  minterm 12  minterm 13  minterm 14  minterm 15  W X Y Z 1 4 12 8 1 5 13 9 3 7 15 11 2 6 14 10

Four Variable K-Map : Groups of Four W X Y Z 1 1 1 X Z

Four Variable Design Example #1 Z 1 F1 Y X W 1 4 5 12 13 8 9 3 2 7 6 15 14 11 10 W X Y Z min 0  min 15  W X Y 1 W Z X Y Z F1 = F(w,x,y,z) = W X Y + W Z + X Y Z

Four Variable Design Example #2 1 4 5 12 13 8 9 3 2 7 6 15 14 11 10 W X Y Z X Z 1 F2 x Y X W X Y Z min 0  min 15  Y Z X Y F2 = F(w,x,y,z) = X Y Z + Y Z + X Y

Basic logic gates Not And OR Nand Nor Xor

=>NOR (Not OR): The Nor Gate has two or more input signals but only one output signal. If all the inputs are 0(i.e., low) ,then the output signal is 1(high) A bubble is an inverter. This is an OR Gate with its output inverted. x y NOR 1

=>NAND GATE: The NAND Gate has two or more input signals but only one output signal. If all the inputs are 1(i.e., high) ,then the output signal is 0(Low) Text Description : Output Y is FALSE if inputs A AND B are TRUE, else it is TRUE. A bubble is an inverter. This is an AND Gate with an inverted output x y NAND 1

=>XNOR (Exclusive-NOR): XNOR gate produces output 1 for XOR (Exclusive-OR): XOR gate produces output 1 for only those input combinations that have odd number of 1’s =>XNOR (Exclusive-NOR): XNOR gate produces output 1 for Only those input combinations that Have even number of 1’s. x y XOR 1 x y XNOR 1

In determining the simplified Boolean function in POS form, the following steps are done: (a)Obtain a simplified sum term for each group of cell containing 0’s by considering only variables that occur in only one form (either uncomplemented or complemented) within the group. Variables that occur both uncomplemented and complemented within each group are eliminated. (b)When all the simplified sum terms are derived from the Karnaugh map, AND all the simplified sum terms to form the simplified Boolean function in POS form.

ADJACENCY RULE Each cell in the K-map is positioned such that its neighboring cells are adjacent to it. The cells in a Karnaugh map are arranged so that there is only a single –variable change between adjacent cells. Adjacency is defined by a single-variable change. Cells that differ by only one variable are adjacent. Cells with values that differ by more than one variable are not adjacent

MAPPING OF 0’s AND 1’s IN THE KARNAUGH MAP 1’s are placed in the squares of a K-map to represents minterms of a Boolean function in canonical SOP (Sum-of-Minterm) form. The number of 1’s in the K-map is equal to the number of product terms in the Boolean function. The cells that do not have a 1 are the cells for which the expression is 0.

KARNAUGH MAP WITH “DON’T CARE” CONDITIONS Sometimes a situation arises in which some input variable combinations are not allowed. For example, recall that in the BCD code, there are six invalid combinations. For NBCD: 1010, 1011, 1100, 1101,1110 and 1111. Since these unallowed states will never occur in an application involving the BCD code, they can be treated as “don’t care”terms with respect to their effect on the output. That is, for these “don’t care” terms either a 1 or a 0 may be assigned to the output; it really does not matter since they will never occur. For each “don’t care” term, an Xis placed in the cell. The “don’t care” terms can be used as an advantage when simplifying because when grouping the 1s (or 0’s), the Xs can be treated as 1s (or 0’s) to maximize the number of elements in a group. Note that maximizing the number of element per group would result to simpler product term (or sum term)

The 0’s placed in the squares of a K-map represents the maxterms of a Boolean function in canonical POS (Product of Maxterm) form. The number of 0’s in the K-map is equal to the number of sum terms in the Boolean function. The cells that do not have a 0 are the cells for which the expression is 1. A Boolean expression in standard (SOP or POS) form should be converted first into its canonica l (Sum of Minterm or Product of Maxterm) expression before mapping the 1’s (or 0’s).

A Boolean expression in standard (SOP or POS) form should be converted first into its canonical (Sum of Minterm or Product of Maxterm) expression before mapping the 1’s (or 0’s). All 1’s and 0’s in the output column of the truth table can be mapped directly onto a Karnaugh map into the cells corresponding to the values of the associated input variable combinations.

GROUPING OF 0’s AND 1’s Group the 1’s (or 0’s) on the Karnaugh map according to the rules given below. The objective is to maximize the number of elements in a group and to minimize the number of groups. (a) Always group adjacent cell containing 1’s (or 0’s) in powers of 2 {1, 2, 4, 8, 16, 32 or 64 1s (or 0s) in a group}. Start by combining the maximum number of adjacent cell containing 1’s (or 0’s).

(b) Always include the largest possible number of 1’s (or 0’s) in a group in accordance with rule (a) to reduce the number of literals in a term. (c) Ensure that each 1’s (or 0’s) are covered when combining the squares. The 1’s (or 0’s) already in a group can be included in another group as long as the overlapping groups include non common 1’s (or 0’s). (d)Minimize the number of groups to reduce the number of terms in the simplified function. Avoid redundant grouping!

DETERMINATION OF SIMPLIFIED BOOLEAN FUNCTION IN SOP AND POS FORM In determining the simplified Boolean function in SOP form, the following steps are done: (a)Obtain a simplified product term for each group of cell containing 1’s by considering only variables that occur in only one form (either un complemented or complemented) within the group. Variables that occur both un complemented and complemented within each group are eliminated. (b)When the entire simplified product terms are derived from the Karnaugh map, they are summed to form the simplified Boolean function in SOP form