BESIII - ZDD S ervizio E lettronico L aboratori F rascati 1 FEE Block Diagram PM ≈ 3.5 mt (coax cable) X2 - 350 MHz Amplifier 1 of 16 channels ON-DETECTOR.

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Presentation transcript:

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 1 FEE Block Diagram PM ≈ 3.5 mt (coax cable) X MHz Amplifier 1 of 16 channels ON-DETECTOR FEE ≈ 30 mt (coax cable) FADC Monitor TDC (4) BUFFER SHAPER BUFFER V TH CF Discriminator OFF-DETECTOR FEE Summing Amplifier Old Lumi BUFFER

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 2 On-Detector FEE – Block Diagram & Requirements  16 input signals from PM (40mV – 400 mV range ns rise time - negative polarity)  ≈ 3 mt coax cable input connections - ≈ 30 mt coax cable output connections

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 3 On-Detector FEE - Schematics

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 4 On-Detector FEE - Master Contenitore 19” 2U

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 5 Off-Detector FEE – Block Diagram & Requiremnts  4 chs modularity  Input signal : 80mV mV range ns rise time - negative polarity - 50 Ω  Output signals :  Analog shaped output (≈ 125 MHz BW) for fast digitizer (FADC)  Analog output for monitor propose (≥ 250 MHz BW)  Analog sum output for Old Lumi (≥ 250 MHz BW)  Digital output for TDC

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 6 Off-Detector FEE - Receiver

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 7 Off-Detector FEE – CF discriminator

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 8 Off-Detector FEE – ADC anti-aliasing filter

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 9 Off-Detector FEE – Summing Amplifier

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 10 Off-Detector FEE – Master

BESIII - ZDD S ervizio E lettronico L aboratori F rascati 11 Front-End status ON-DETECTOROFF-DETECTOR PCB Layout ✔ 25/3 PCB Productionin corso22/4 Ordine Componentiin corsoIn corso Meccanica ✔ In corso Assemblaggio8/429/4 Test18/46/5 Goal : 1 modulo on-detector FE (16 chs) + 1 modulo off- detector (4 chs) entro il 15/5