EE 319K Introduction to Embedded Systems

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Presentation transcript:

EE 319K Introduction to Embedded Systems Lecture 3: Debugging, Arithmetic Operations, More I/O, Switch and LED interfacing Bard, Gerstlauer, Valvano, Yerraballi

Announcements Sign up to Piazza and set to receive email HW2 due next Monday Before going to lab this week, make sure to install the drivers http://users.ece.utexas.edu/~valvano/arm/download.html Step 3 – Method 1 Bard, Gerstlauer, Valvano, Yerraballi

Agenda Recap Outline GPIO Logic and Shift Operations Addressing Modes Subroutines and the Stack Introduction to C Outline Debugging Arithmetic Operations Random Number Generator example Digital Logic GPIO TM4C123/LM4F120 Specifics Switch and LED interfacing Bard, Gerstlauer, Valvano, Yerraballi

Debugging Aka: Testing, Diagnostics, Verification Debugging Actions Functional debugging, input/output values Performance debugging, input/output values with time Tracing, measure sequence of operations Profiling, measure percentage for tasks, time relationship between tasks Performance measurement, how fast it executes Optimization, make tradeoffs for overall good improve speed, improve accuracy, reduce memory, reduce power, reduce size, reduce cost Debugging principles Control and observability Can’t see everything; need to be smart when debugging Bard, Gerstlauer, Valvano, Yerraballi 4

Debugging Intrusiveness Intrusive Debugging degree of perturbation caused by the debugging itself how much the debugging slows down execution Non-intrusive Debugging characteristic or quality of a debugger allows system to operate as if debugger did not exist e.g., logic analyzer, ICE, BDM Minimally intrusive negligible effect on the system being debugged e.g., dumps(ScanPoint) and monitors Highly intrusive print statements, breakpoints and single-stepping Minimally intrusive Dumps execute faster (<1us) compared to print statements (10ms) Bard, Gerstlauer, Valvano, Yerraballi 5

Debugging Aids in Keil Interface Breakpoints Registers including xPSR Memory and Watch Windows Logic Analyzer, GPIO Panel Single Step, StepOver, StepOut, Run, Run to Cursor Watching Variables in Assembly EXPORT VarName[DATA,SIZE=4] Command Interface (Advanced but useful) WS 1, `VarName,0x10 LA (PORTD & 0x02)>>1 Commands given: 1: WS 1, `VarName,0x10 Puts the variable called VarName in the first watch window 2: LA (PORTD & 0x02)>>1 Puts port D pin 2 in logic anlayzer Bard, Gerstlauer, Valvano, Yerraballi 6

… Debugging Instrumentation: Code we add to the system that aids in debugging E.g., print statements Good practice: Define instruments with specific pattern in their names Use instruments that test a run time global flag leaves a permanent copy of the debugging code causing it to suffer a runtime overhead simplifies “on-site” customer support. Use conditional compilation (or conditional assembly) Keil supports conditional assembly Easy to remove all instruments Visualization: How the debugging information is displayed Black box testing Control inputs, observe outputs White box testing 0) pick the most likely place of failure 1) desk check: conceive of what you expect will happen at each step 2) breakpoint at the start of the place 3) single step (or step over) 4) compare what actually happened to what you wanted to have happen Bard, Gerstlauer, Valvano, Yerraballi 7

ARM ISA : ADD, SUB and CMP ARITHMETIC INSTRUCTIONS ADD{S} {Rd,} Rn, <op2> ;Rd = Rn + op2 ADD{S} {Rd,} Rn, #im12 ;Rd = Rn + im12 SUB{S} {Rd,} Rn, <op2> ;Rd = Rn - op2 SUB{S} {Rd,} Rn, #im12 ;Rd = Rn - im12 RSB{S} {Rd,} Rn, <op2> ;Rd = op2 - Rn RSB{S} {Rd,} Rn, #im12 ;Rd = im12 - Rn CMP Rn, <op2> ;Rn - op2 CMN Rn, <op2> ;Rn - (-op2) ‘S’ variants: set condition codes (default: not set) Addition C bit set if unsigned overflow V bit set if signed overflow Subtraction C bit clear if unsigned overflow V bit set if signed overflow Bard, Gerstlauer, Valvano, Yerraballi

ARM ISA : Multiply and Divide 32-BIT MULTIPLY/DIVIDE INSTRUCTIONS MUL{S} {Rd,} Rn, Rm ;Rd = Rn * Rm MLA Rd, Rn, Rm, Ra ;Rd = Ra + Rn*Rm MLS Rd, Rn, Rm, Ra ;Rd = Ra - Rn*Rm UDIV {Rd,} Rn, Rm ;Rd = Rn/Rm unsigned SDIV {Rd,} Rn, Rm ;Rd = Rn/Rm signed Multiplication does not set C,V bits MULS sets N and Z, but not C and V. Bard, Gerstlauer, Valvano, Yerraballi

Random Number Generator ;Program demonstrates Arithmetic operations ; ADD, SUB, MUL and IDIV ; LR loss when sub calls sub - Solution Seed EQU 123456789 THUMB AREA DATA, ALIGN=2 EXPORT M [DATA,SIZE=4] M SPACE 4 ALIGN AREA |.text|, CODE, READONLY, ALIGN=2 EXPORT Start ; Need this to be able to watch RAM ; Variable M (in Assembly only) Start LDR R2,=M ; R2 points to M LDR R0,=Seed ; Initial seed STR R0,[R2] ; M=Seed loop BL Random ; R0 has rand number B loop ;------------Random------------ ; Return R0= 32-bit random number ; Linear congruential generator ; from Numerical Recipes by Press et al. Random LDR R2,=M ; R2 points to M LDR R0,[R2] ; R0=M LDR R1,=1664525 MUL R0,R0,R1 ; R0 = 1664525*M LDR R1,=1013904223 ADD R0,R1 ; 1664525*M+1013904223 STR R0,[R2] ; store M BX LR Global variable M How it is defined How it is written How it is read Function Random How it is called How it returns Bard, Gerstlauer, Valvano, Yerraballi

Bus Driver Tristate Gate Bard, Gerstlauer, Valvano, Yerraballi

Open Collector Used to control current to LED Low allows current to flow to ground HiZ prevents current from flowing Bard, Gerstlauer, Valvano, Yerraballi

Input/Output: TM4C123 6 General-Purpose I/O (GPIO) ports: Four 8-bit ports (A, B, C, D) One 6-bit port (E) One 5-bit port (F) Bard, Gerstlauer, Valvano, Yerraballi 13

TM4C123 I/O Pins I/O Pin Characteristics Set AFSEL to 0 Can be employed as an n-bit parallel interface Pins also provide alternative functions: UART Universal asynchronous receiver/transmitter SSI Synchronous serial interface I2C Inter-integrated circuit Timer Periodic interrupts, input capture, and output compare PWM Pulse width modulation ADC Analog to digital converter, measure analog signals Analog Compare two analog signals Comparator QEI Quadrature encoder interface USB Universal serial bus Ethernet High speed network CAN Controller area network Set AFSEL to 0 Set AFSEL to 1 Bard, Gerstlauer, Valvano, Yerraballi

TM4C123 LaunchPad I/O Pins

TM4C123 I/O registers Four 8-bit ports (A, B, C, D) One 6-bit port (E) One 5-bit port (F) PA1-0 to COM port PC3-0 to debugger PD5-4 to USB device Bard, Gerstlauer, Valvano, Yerraballi 16

Switch Configuration positive – pressed = ‘1’ negative – pressed = ‘0’ Bard, Gerstlauer, Valvano, Yerraballi

Switch Configuration Positive Logic t Negative Logic s – pressed, 0V, false – not pressed, 3.3V, true Positive Logic t – pressed, 3.3V, true – not pressed, 0V, false Bard, Gerstlauer, Valvano, Yerraballi

LED Interfacing LED current v. voltage Brightness = power = V*I anode (+) cathode (1) “big voltage connects to big pin” Bard, Gerstlauer, Valvano, Yerraballi

LED Configuration Bard, Gerstlauer, Valvano, Yerraballi

LED Interfacing R = (3.3V – 1.6)/0.001 = 1.7 kOhm R = (5.0-2-0.5)/0.01 S + 5 V O u t o r R 1 m A R T M 4 C 7 4 6 L M 3 S 1 m A L E D o r + 5 V L E D T M 4 C h i g h . 5 V O u t LED current < 8 ma LED current > 8 ma LED may contain several diodes in series Bard, Gerstlauer, Valvano, Yerraballi

LaunchPad Switches and LEDs The switches on the LaunchPad Negative logic Require internal pull-up (set bits in PUR) The PF3-1 LEDs are positive logic Bard, Gerstlauer, Valvano, Yerraballi

Initialization Ritual Initialization (executed once at beginning) Turn on Port F clock in SYSCTL_RCGCGPIO_R Wait two bus cycles (two NOP) Unlock PF0 (PD7 also needs unlocking) Clear AMSEL to disable analog Clear PCTL to select GPIO Set DIR to 0 for input, 1 for output Clear AFSEL bits to 0 to select regular I/O Set PUE bits to 1 to enable internal pull-up Set DEN bits to 1 to enable data pins Input from switches, output to LED Read/write GPIO_PORTF_DATA_R Prog 4.1, show PortF_Init function in InputOutput_xxxasm Bard, Gerstlauer, Valvano, Yerraballi 23

I/O Port Bit-Specific I/O Port bit-specific addressing is used to access port data register Define address offset as 4*2b, where b is the selected bit position 256 possible bit combinations (0-8) Add offsets for each bit selected to base address for the port Example: PF4 and PF0 Port F = 0x4005.D000 0x4005.D000+0x0004+0x0040 = 0x4005.D044 Provides friendly and atomic access to port pins Show PortF_Input2 function in InputOutput_xxxasm Bard, Gerstlauer, Valvano, Yerraballi