Storage area network and System area network (SAN)

Slides:



Advertisements
Similar presentations
1 UNIT I (Contd..) High-Speed LANs. 2 Introduction Fast Ethernet and Gigabit Ethernet Fast Ethernet and Gigabit Ethernet Fibre Channel Fibre Channel High-speed.
Advertisements

Introduction to Storage Area Network (SAN) Jie Feng Winter 2001.
System Area Network Abhiram Shandilya 12/06/01. Overview Introduction to System Area Networks SAN Design and Examples SAN Applications.
CCNA3: Switching Basics and Intermediate Routing v3.0 CISCO NETWORKING ACADEMY PROGRAM Switching Concepts Introduction to Ethernet/802.3 LANs Introduction.
Chabot College Chapter 2 Review Questions Semester IIIELEC Semester III ELEC
Jaringan Komputer Lanjut Packet Switching Network.
1 Message passing architectures and routing CEG 4131 Computer Architecture III Miodrag Bolic Material for these slides is taken from the book: W. Dally,
Advanced Networking Wickus Nienaber Daniel Beech.
©2003 Dror Feitelson Parallel Computing Systems Part II: Networks and Routing Dror Feitelson Hebrew University.
IBM RS6000/SP Overview Advanced IBM Unix computers series Multiple different configurations Available from entry level to high-end machines. POWER (1,2,3,4)
1 Lecture 12: Interconnection Networks Topics: dimension/arity, routing, deadlock, flow control.
I/O Channels I/O devices getting more sophisticated e.g. 3D graphics cards CPU instructs I/O controller to do transfer I/O controller does entire transfer.
NUMA Mult. CSE 471 Aut 011 Interconnection Networks for Multiprocessors Buses have limitations for scalability: –Physical (number of devices that can be.
CS 258 Parallel Computer Architecture Lecture 5 Routing February 6, 2008 Prof John D. Kubiatowicz
Server Platforms Week 11- Lecture 1. Server Market $ 46,100,000,000 ($ 46.1 Billion) Gartner.
1 Lecture 24: Interconnection Networks Topics: communication latency, centralized and decentralized switches (Sections 8.1 – 8.5)
3. Interconnection Networks. Historical Perspective Early machines were: Collection of microprocessors. Communication was performed using bi-directional.
Parallel System Performance CS 524 – High-Performance Computing.
1 Lecture 24: Interconnection Networks Topics: topologies, routing, deadlocks, flow control.
A Scalable, Commodity Data Center Network Architecture Mohammad Al-Fares, Alexander Loukissas, Amin Vahdat Presented by Gregory Peaker and Tyler Maclean.
5/8/2006 Nicole SAN Protocols 1 Storage Networking Protocols Nicole Opferman CS 526.
1 25\10\2010 Unit-V Connecting LANs Unit – 5 Connecting DevicesConnecting Devices Backbone NetworksBackbone Networks Virtual LANsVirtual LANs.
Modeling and Evaluation of Fibre Channel Storage Area Networks Xavier Molero, Federico Silla, Vicente Santonia and Jose Duato.
Connecting LANs, Backbone Networks, and Virtual LANs
Switching, routing, and flow control in interconnection networks.
WAN Technologies & Topologies Lecture 8 October 4, 2000.
Interconnection Networks. Applications of Interconnection Nets Interconnection networks are used everywhere! ◦ Supercomputers – connecting the processors.
1 The Turn Model for Adaptive Routing. 2 Summary Introduction to Direct Networks. Deadlocks in Wormhole Routing. System Model. Partially Adaptive Routing.
Chapter 6 High-Speed LANs Chapter 6 High-Speed LANs.
CHAPTER 11: Modern Computer Systems
1 Lecture 7: Part 2: Message Passing Multicomputers (Distributed Memory Machines)
LECTURE 9 CT1303 LAN. LAN DEVICES Network: Nodes: Service units: PC Interface processing Modules: it doesn’t generate data, but just it process it and.
Interconnect Networks
On-Chip Networks and Testing
CHAPTER 11: Modern Computer Systems
Towards a Common Communication Infrastructure for Clusters and Grids Darius Buntinas Argonne National Laboratory.
Infiniband subnet management Discuss the Infiniband subnet management system Discuss fat tree and subnet management in an Infiniband with a fat tree topology.
1 Lecture 7: Interconnection Network Part I: Basic Definitions Part II: Message Passing Multicomputers.
QoS Support in High-Speed, Wormhole Routing Networks Mario Gerla, B. Kannan, Bruce Kwan, Prasasth Palanti,Simon Walton.
The NE010 iWARP Adapter Gary Montry Senior Scientist
1 Message passing architectures and routing CEG 4131 Computer Architecture III Miodrag Bolic Material for these slides is taken from the book: W. Dally,
ECE669 L21: Routing April 15, 2004 ECE 669 Parallel Computer Architecture Lecture 21 Routing.
Network-on-Chip Introduction Axel Jantsch / Ingo Sander
1 CHAPTER 8 TELECOMMUNICATIONSANDNETWORKS. 2 TELECOMMUNICATIONS Telecommunications: Communication of all types of information, including digital data,
What is a Network? Living Online Lesson 1 Mrs. Elzey.
Infiniband Bart Taylor. What it is InfiniBand™ Architecture defines a new interconnect technology for servers that changes the way data centers will be.
STORE AND FORWARD & CUT THROUGH FORWARD Switches can use different forwarding techniques— two of these are store-and-forward switching and cut-through.
McGraw-Hill©The McGraw-Hill Companies, Inc., 2004 Connecting Devices CORPORATE INSTITUTE OF SCIENCE & TECHNOLOGY, BHOPAL Department of Electronics and.
Ethernet. Ethernet standards milestones 1973: Ethernet Invented 1983: 10Mbps Ethernet 1985: 10Mbps Repeater 1990: 10BASE-T 1995: 100Mbps Ethernet 1998:
Interconnection network network interface and a case study.
Interconnect Networks Basics. Generic parallel/distributed system architecture On-chip interconnects (manycore processor) Off-chip interconnects (clusters.
Rehab AlFallaj.  Network:  Nodes: Service units: PC Interface processing Modules: it doesn’t generate data, but just it process it and do specific task.
Introduction Computer networks: – definition – computer networks from the perspectives of users and designers – Evaluation criteria – Some concepts: –
Virtual-Channel Flow Control William J. Dally
1 Lecture 24: Interconnection Networks Topics: communication latency, centralized and decentralized switches, routing, deadlocks (Appendix F)
Exploiting Task-level Concurrency in a Programmable Network Interface June 11, 2003 Hyong-youb Kim, Vijay S. Pai, and Scott Rixner Rice Computer Architecture.
Cluster Computers. Introduction Cluster computing –Standard PCs or workstations connected by a fast network –Good price/performance ratio –Exploit existing.
Interconnection Networks Communications Among Processors.
COMP8330/7330/7336 Advanced Parallel and Distributed Computing Communication Costs in Parallel Machines Dr. Xiao Qin Auburn University
CHAPTER 11: Modern Computer Systems
Modeling and Evaluation of Fibre Channel Storage Area Networks
The Underlying Technologies
Introduction to Networks
CT1303 LAN Rehab AlFallaj.
Switching, routing, and flow control in interconnection networks
Storage Networking Protocols
Storage area network and System area network (SAN)
Networks Networking has become ubiquitous (cf. WWW)
Switching, routing, and flow control in interconnection networks
Cluster Computers.
Presentation transcript:

Storage area network and System area network (SAN) What are they? Network requirements Hardware/software issues References: Ulf Troppens, Rainer Erkens, a nd Wolfgang Muller, “Storage Networks Explained - basic and application of Fibre Channel SAN, NAS, iSCSI and Infiniband”, John Wiley & Sons, 2004. W. J. Dally and B. Towles, “Principles and Practices of Interconnection Networks”, Morgan Kaufmann, 2004. Ajay V. Bhatt, “Creating a Third Generation I/O Interconnect,” available at http://www.express-lane.org

Storage area network (SAN): Server-centric IT architecture: storage devices exist only with servers

Storage-centric IT architecture: SCSI cables are replaced by a network (storage is now independent of servers).

Storage area network (SAN) requirement: Serial transmission for high speed and long distance Low transmission errors Low delay of transmitted data Needs to make it feel like using a local disk Low delay is a relative term: The disk subsystem has around 1ms – 10ms latency itself. The communication protocol should not use CPU.

Current Storage area network (SAN) technology (IBM): Fibre Channel TCP/IP + Gigabit Ethernet (iSCSI) InfiniBand

System area network: a network with a high bandwidth and a low lantency that serves as a connection between computers in a distributed computer system.

Why system area network: Historically, the system area network comes with a particular parallel machine (supercomputer, e.g. Cray T3D, Cray T3E, SGI origin 2000, IBM SP, Thinking machine CM5, Intel Polygon) The network is very expensive due to low volume CPU is two generations behind A more cost effective way to build these system is to decouple the processor technology from the networking technology. To form cheaper clusters of workstations with the off-the-shelf system area network technology (compared to traditional supercomputers). current system area networks: Myrinet, Quadrics, Infiniband

System area network requirement: Low latency and high bandwidth at the application level. Not just at the hardware level Not just at the system level Implicitation: Hardware, network interface, software messaging layer should work together to achieve the goal. Infiniband is designed as both storage area network and system area network.

Hardware issues: High speed links: Infiniband: 2.5Gbps = 250MBps, 10Gbps=1GBps, 30 Gbps = 1GBps Fibre channel: 100MBps, 200MBps, 400MBps, 1GBps. Myrinet: up to 9.6Gbps As a reference PCI bus: 100MBps NIC may need to attach to the memory bridge

A typical PC:

A workstation connected to a system area network:

When the number of end points is large, multiple switches will be needed. Topology Switching Routing

Topology Static arrangement of channels and nodes in an interconnection network Trade-off between cost and performance Cost: the number and complexity of chips, density and length of the interconnections, etc. Performance: Bandwidth and latency: also depend on other factors other than topology Topology performance metrics: Bisection bandwidth, diameter, nodal degree, channel load

A cut of a network is the set of channels that partitions the set of all nodes into two disjoint sets. A bisection of a network is a cut that partitions the network nodes in roughly half. The bisection bandwidth of a network is the minimum bandwidth over all bisections of the network. The diameter of a network is the largest minimal hop count over all pairs of nodes. Under a particular traffic pattern, the channel that carries the largest fraction of traffic determines the maximum channel load of the topology.

Example topologies: Regular or irregular Regular topologies are mostly derived from two main families: butterflies (k-ary n-flies) or tori (k-ary n-cubes)

Switching: how a packet pass a switch Message/packet/flit

Traditional scheme: store-and-forward Time = H (S + P/B)

Cut-through switch: Forward to the next link after the header flit is received. Stop only when the next hop buffer is not available. Time = H S + P/B, when S << P/B, the time does not depend on the number of hops!!!

Wormhole routing: Cut-through switches still allocate buffer to packets. May require a large amount of buffers Wormhole routing only allocates buffer for one flit for each packet. Latency is the same as cut-through switching. When the packet is block, the whole flit “train” is block, occupying links. Solution: add more virtual channels.

The deadlock problem in wormhole routing: Need deadlock free routing scheme to select the right path

Cut-through switch and wormhole switch are widely used in system are networks Routing in such systems is an issue!! Shortest path routing may result in deadlock. Deadlock free routing:

Cut-through switch and wormhole switch are widely used in system are networks Routing in such systems is an issue!! Shortest path routing may result in deadlock. Deadlock free routing: Basic idea: fix the priority of channels and using the channels with increasing priority. Example: up/down routing

Up/down routing: Select a node as the root Build a spanning tree from the root Nodes are partitioned into layers based on the position in the spanning tree The channel from a lower layer node to a higher layer node is the up link, the channel from a higher layer node to a lower layer node is a down link, channels between nodes in the same layer are marked as up or down link based on the node number In the valid route: an up channel cannot follow an down channel. These exists at least one valid path between each pair of nodes.

Problems with deadlock free routing: Load balancing is a problem, traffic are not evenly distributed Non-adaptive version of the deadlock free routing scheme is also a problem How to map the routes in order to get good performance (metrics: maximum channel load?) More on the problem to be discussed later.

Hardware/software codesign and software API issues: What functionality should be implemented in the hardware. E.g. adaptive routing may imply out of order packets Chien’04 paper gives good answers to some of these questions.