Farzan Fallah Srinivas Devadas Laboratory for Computer Science MIT Farzan Fallah Srinivas Devadas Laboratory for Computer Science MIT Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability Kurt Keutzer Department of EECS UC Berkeley Kurt Keutzer Department of EECS UC Berkeley

Outline zIntroduction zFunctional test vector generation strategy zNew hybrid SAT method zResults zOngoing work

Design Verification Introduction if (C) A = 1; else A = 2; $display(“%d”, A);

Design Verification zHow do we solve the design verification problem? ¬ Formal verification  Who specifies correctness property? ­ Simulation  How do you get the test vectors? Introduction

Coverage Directed Simulation ¬ Choose a coverage metric, e.g., line/branch/path coverage. ­ Automatically generate vectors that achieve targeted coverage under chosen metric. Introduction

Functional Vector Generation Strategy zWe view HDL descriptions as interconnections of combinational modules which include Boolean and word-level operators. X Y + f G > Z W c d x2x2 x0x0 0 1

Functional Vector Generation Strategy zBoolean operators: AND, OR, and INVERTER gates. zWord-level operators: Comparison: Addition/Subtraction: Increment/Decrement: Scalar multiplication: Left/Right shift:

Functional Vector Generation Strategy zAny other operator must be converted into a collection of the previous operators. Example can be modeled as,

Functional Vector Generation Strategy z can be modeled as, and 4 constraints over Y and individual bits of X for each p i, where p i is a partial product. Z = 2 n-1 p n n-2 p n-2 + … + p 0

Functional Vector Generation Strategy zWe choose path coverage metric. zA path is a set of alternating modules and signals. m1m1 m2m2 S1S1 S2S2 S3S3 P={S 1, m 1, S 2, m 2, S 3 }

Functional Vector Generation Strategy zSensitizing a sub-path through a module means the value of the input to the path should affect the value at the output. A 0 0 z zSensitizing a path means sensitizing each module.

Functional Vector Generation Strategy zSensitization of a sub-path through a module will require values at some of the module inputs. zValue of side-inputs for logic gates, Side-inputs AND 1 OR 0

Functional Vector Generation Strategy zValue of side-input for word-level operators (assuming unsigned numbers), A B C A B > C A k C

Functional Vector Generation Strategy b a c > Y X ä ä S elect a path. ä ä Write sensitization requirement on intermediate signals. b = 1 Constraints: ä ä Write module input-output relationship for every module in the circuit. c = a AND b b = X > Y ä ä Find a solution that satisfies the set of constraints.

Functional Vector Generation Strategy zHow do we find a solution to the constraints? ¬ Use Boolean clauses to model all modules and solve resulting 3-SAT problem. ­ Use Boolean clauses and linear constraints to model modules and solve the problem using 3-SAT solver and integer program solver. zBoth methods use Branch and Bound technique.

3-SAT Approach zUse Boolean clauses to model input-output relationship of each gate. X Y Z Y X

3-SAT Approach zSolve the resulting 3-SAT problem to find a satisfying assignment for all input variables. z3-SAT approach is not efficient because word- level operators have to be modeled using Boolean operators.

New Hybrid Satisfiability Approach 1 0 b e a h X Y + f g > Z W c d x2x2 x0x0 0 1 ä ä We want to exercise a path in the circuit. ä ä Use linear word-level operators (Linear arithmetic constraints, LACs) to model data-path. G 1 0 b e a h f g c d x2x2 x0x0 0 1

1 0 b e a h f g c d x2x2 x0x0 0 1 ä ä Choose values for side-inputs. New Hybrid Satisfiability Approach

ä ä Control part is modeled using Boolean operations. ?? ä ä Choose values for side-inputs. ä ä Gates are modeled using Boolean clauses. New Hybrid Satisfiability Approach 1 0 b e a h f g c d x2x2 x0x0 0 1

ä ä Gates are modeled using Boolean clauses. Correlation: x 0 is first bit of X x 2 is third bit of X g is equal to G ä ä There is correlation between Boolean variables and integer variables. New Hybrid Satisfiability Approach

ä ä Essential variable: If there is a single variable in TRUE (complemented) form in a clause it must be set to 1(0). Simplifying SAT ä ä c must be set to 0. Correlation: x 0 is first bit of X x 2 is third bit of X g is equal to G New Hybrid Satisfiability Approach

Correlation: x 0 -X, x 2 -X, g-G Simplifying SAT ä ä New essential variables might be created. Current assignment: c=0, e=1 New Hybrid Satisfiability Approach

Simplifying SAT ä ä Unate variable: If a variable only appears in true (complemented) form it can be set to 1(0). Correlation: x 0 -X, x 2 -X, g-G Current assignment: c=0, e=1 ä ä We can set b to 1., b=1 ä ä Note that there was no integer variable correlated to b. ä ä Use unate variable rule recursively. New Hybrid Satisfiability Approach

ä ä Use polynomial time sufficiency check for SAT infeasibility. Correlation: x 0 -X, x 2 -X, g-G ä ä If SAT is infeasible, there is no solution for the constraints, otherwise we continue search for the solution. Linear infeasibility ä ä If linear relaxation of LACs is infeasible, there is no solution to the constraints. This can be checked in polynomial time. New Hybrid Satisfiability Approach Current assignment: c=0, e=1, b=1, f=0

Branching ä ä Select a Boolean variable heuristically and set it to 1(0), if it fails to find a feasible solution, set it to 0(1). Correlation: x 0 -X, x 2 -X, g-G ä ä Choose an input variable which appears in clauses most (x 2 ). ä ä Set x 2 to 1. New Hybrid Satisfiability Approach Current assignment: c=0, e=1, b=1, f=0

Current assignment: c=0, e=1, b=1, f=0, x 2 =1 ä ä Set d to 1. Correlation: x 0 -X, x 2 -X, g-G New Hybrid Satisfiability Approach Simplifying SAT

Current assignment: c=0, e=1, b=1, f=0, x 2 =1, d=1 Branching ä ä Set h to 1. Correlation: x 0 -X, x 2 -X, g-G ä ä There is a correlation between x 2 and X, use new integer variables and modify LACs. New Hybrid Satisfiability Approach, h=1

Branching ä ä Find a solution to LACs using Integer Programming. Correlation: x 0 -X, x 2 -X, g-G New Hybrid Satisfiability Approach Current assignment: c=0, e=1, b=1, f=0, x 2 =1, d=1, h=1

Branching ä ä Free Boolean variables correlated to integer variables, are set to the appropriate values. Solution Boolean Variables: c=0, e=1, b=1, f=0, x 2 =1, d=1, h=1, x 0 =X, g=X Integer Variables: X 7-3 =0, X 1-0 =0, Y=0, W=4, Z=0, G=1 New Hybrid Satisfiability Approach

Branching ä ä Free Boolean variables correlated to integer variables, are set to the appropriate values. Solution Boolean Variables: c=0, e=1, b=1, f=0, x 2 =1, d=1, h=1, x 0 =0, g=X Integer Variables: X 7-3 =0, X 1-0 =0, Y=0, W=4, Z=0, G=1 New Hybrid Satisfiability Approach

Branching ä ä Free Boolean variables correlated to integer variables, are set to the appropriate values. Solution Boolean Variables: c=0, e=1, b=1, f=0, x 2 =1, d=1, h=1, x 0 =0, g=1 Integer Variables: X 7-3 =0, X 1-0 =0, Y=0, W=4, Z=0, G=1 New Hybrid Satisfiability Approach

Example HSAT3-SAT #Clauses/ #LACs #Clauses Exp. Time/ Sat. Time pport schsm ctla ctlbc mult16 17/18 141/24 1/24 1/60 0/104 <1 s 16 s /4.7 s 3.1/261 s 4.9/142 s >1000 s Results <1 s 8466 >1000 s

Ongoing Work zImprovement on satisfiability checking using seamless integration of linear programming and satisfiability. zCurrently we use conventional time frame expansion strategy for sequential HDL models.  We are exploring more efficient algorithms. zWe are working on generating functional vectors for a variety of code coverage metrics.

Future system overview Ongoing Work Simulation driver (vectors) Simulation monitor (yes/no) Simulation engine Simulation model (HDL) OCCOM Coverage Analysis LP-3SAT Vector Generation Is it enough? Yes No Stop Diagnosis of Unverified Portions OCCOM talk