Microcontroller 8051.

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Presentation transcript:

Microcontroller 8051

Contents: Introduction Block Diagram and Pin Description of the 8051 Registers Memory mapping in 8051 Stack in the 8051 I/O Port Programming Timer Interrupt

Why do we need to learn Microprocessors/controllers? The microprocessor is the core of computer systems. Nowadays many communication, digital entertainment, portable devices, are controlled by them. A designer should know what types of components he needs, ways to reduce production costs and product reliable.

Different aspects of a microprocessor/controller Hardware :Interface to the real world Software :order how to deal with inputs

The necessary tools for a microprocessor/controller CPU: Central Processing Unit I/O: Input /Output Bus: Address bus & Data bus Memory: RAM & ROM Timer Interrupt Serial Port Parallel Port

Microprocessors: General-purpose microprocessor CPU for Computers No RAM, ROM, I/O on CPU chip itself Example:Intel’s x86, Motorola’s 680x0 Many chips on mother’s board Data Bus CPU General-Purpose Micro-processor Serial COM Port I/O Port Intel’s x86: 8086,8088,80386,80486, Pentium Motorola’s 680x0: 68000, 68010, 68020,68030,6040 RAM ROM Timer Address Bus General-Purpose Microprocessor System

Microcontroller : A single chip A smaller computer On-chip RAM, ROM, I/O ports... Example:Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X CPU RAM ROM A single chip Serial COM Port I/O Port Timer Microcontroller

Microprocessor vs. Microcontroller CPU is stand-alone, RAM, ROM, I/O, timer are separate designer can decide on the amount of ROM, RAM and I/O ports. expansive versatility general-purpose Microcontroller CPU, RAM, ROM, I/O and timer are all on a single chip fix amount of on-chip ROM, RAM, I/O ports for applications in which cost, power and space are critical single-purpose versatility 多用途的: any number of applications for PC

Embedded System Embedded system means the processor is embedded into that application. An embedded product uses a microprocessor or microcontroller to do one task only. In an embedded system, there is only one application software that is typically burned into ROM. Example:printer, keyboard, video game player processor 整合到整個系統中, 你只看到此系統的外觀, 應用, 感覺不到有 processor 在其中. Embedded system 通常只有一項應用, 而 PC 有許多 applications (game, accounting, fax, mail...) A printer is an example of embedded system since the processor inside it performs one task only.

Three criteria in Choosing a Microcontroller meeting the computing needs of the task efficiently and cost effectively speed, the amount of ROM and RAM, the number of I/O ports and timers, size, packaging, power consumption easy to upgrade cost per unit availability of software development tools assemblers, debuggers, C compilers, emulator, simulator, technical support wide availability and reliable sources of the microcontrollers.

Block Diagram External interrupts On-chip ROM for program code Timer/Counter Interrupt Control On-chip RAM Timer 1 Counter Inputs Timer 0 CPU Serial Port Bus Control 4 I/O Ports OSC P0 P1 P2 P3 TxD RxD Address/Data

Pin Description of the 8051 8051  1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (T0)P3.4 (T1)P3.5 XTAL2 XTAL1 GND (INT0)P3.2 (INT1)P3.3 (RD)P3.7 (WR)P3.6 Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8) 8051 

Vcc provides supply voltage to the chip. The voltage source is +5V. Pins of 8051(1/4) Vcc(pin 40): Vcc provides supply voltage to the chip. The voltage source is +5V. GND(pin 20):ground XTAL1 and XTAL2(pins 19,18)

Figure (a). XTAL Connection to 8051 Using a quartz crystal oscillator We can observe the frequency on the XTAL2 pin. C2 30pF C1 XTAL2 XTAL1 GND 

It is an input pin and is active high(normally low). Pins of 8051(2/4) RST(pin 9):reset It is an input pin and is active high(normally low). The high pulse must be high at least 2 machine cycles. It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers

Figure (b). Power-On RESET Circuit Vcc + 10 uF 31 EA/VPP X1 30 pF 19 11.0592 MHz 8.2 K X2 18 30 pF RST 9 

/EA(pin 31):external access Pins of 8051(3/4) /EA(pin 31):external access There is no on-chip ROM in 8031 and 8032 . The /EA pin is connected to GND to indicate the code is stored externally. /PSEN & ALE are used for external ROM. For 8051, /EA pin is connected to Vcc. “/” means active low. /PSEN(pin 29):program store enable This is an output pin and is connected to the OE pin of the ROM.

ALE(pin 30):address latch enable Pins of 8051(4/4) ALE(pin 30):address latch enable It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. I/O port pins The four ports P0, P1, P2, and P3. Each port uses 8 pins. All I/O pins are bi-directional.

Ex:P0.0 is the bit 0(LSB)of P0 Ex:P0.7 is the bit 7(MSB)of P0 Pins of I/O Port The 8051 has four I/O ports Port 0 (pins 32-39):P0(P0.0~P0.7) Port 1(pins 1-8) :P1(P1.0~P1.7) Port 2(pins 21-28):P2(P2.0~P2.7) Port 3(pins 10-17):P3(P3.0~P3.7) Each port has 8 pins. Named P0.X (X=0,1,...,7), P1.X, P2.X, P3.X Ex:P0.0 is the bit 0(LSB)of P0 Ex:P0.7 is the bit 7(MSB)of P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction). Program is to read data from P0 and then send data to P1 

Hardware Structure of I/O Pin Each pin of I/O ports Internal CPU bus:communicate with CPU A D latch store the value of this pin D latch is controlled by “Write to latch” Write to latch=1:write data into the D latch 2 Tri-state buffer: TB1: controlled by “Read pin” Read pin=1:really read the data present at the pin TB2: controlled by “Read latch” Read latch=1:read value from internal latch A transistor M1 gate Gate=0: open Gate=1: close

D Latch:

A Pin of Port 1 P0.x 8051 IC Read latch Vcc TB2 Load(L1) P1.X pin D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X TB1 TB2 P0.x 8051 IC

Writing “1” to Output Pin P1.X D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X TB2 2. output pin is Vcc 1. write a 1 to the pin 1 output 1 TB1 8051 IC

Writing “0” to Output Pin P1.X D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X TB2 2. output pin is ground 1. write a 0 to the pin output 0 1 TB1 8051 IC

Reading “High” at Input Pin D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X 2. MOV A,P1 external pin=High TB2 write a 1 to the pin MOV P1,#0FFH 1 1 TB1 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC

Reading “Low” at Input Pin D Q Clk Q Vcc Load(L1) Read latch Read pin Write to latch Internal CPU bus M1 P1.X pin P1.X 2. MOV A,P1 external pin=Low TB2 write a 1 to the pin MOV P1,#0FFH 1 TB1 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC

Other Pins P1, P2, and P3 have internal pull-up resisters. P1, P2, and P3 are not open drain. P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051. P0 is open drain. Compare the figures of P1.X and P0.X.  However, for a programmer, it is the same to program P0, P1, P2 and P3. All the ports upon RESET are configured as output.

A Pin of Port 0 P1.x 8051 IC Read latch TB2 P0.X pin Internal CPU bus D Q Clk Q Read latch Read pin Write to latch Internal CPU bus M1 P0.X pin P1.X TB1 TB2 P1.x 8051 IC

Port 0 with Pull-Up Resistors DS5000 8751 8951 Vcc 10 K Port 0

Port 3 Alternate Functions 17 RD P3.7 16 WR P3.6 15 T1 P3.5 14 T0 P3.4 13 INT1 P3.3 12 INT0 P3.2 11 TxD P3.1 10 RxD P3.0 Pin Function P3 Bit 

RESET Value of Some 8051 Registers: PC 0000 ACC 0000 B 0000 PSW 0000 SP 0007 DPTR 0000 RAM are all zero. 

Some 8-bitt Registers of the 8051 A B R0 R1 R3 R4 R2 R5 R7 R6 DPH DPL PC DPTR Some 8051 16-bit Register Some 8-bitt Registers of the 8051

Memory mapping in 8051 ROM memory map in 8051 family 4k 8k 32k 0000H 0FFFH 1FFFH 7FFFH 8751 AT89C51 8752 AT89C52 4k 8k 32k DS5000-32 from Atmel Corporation from Dallas Semiconductor

RAM memory space allocation in the 8051 7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 (Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM

Stack in the 8051 7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 (Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07.

TMOD Register: Gate : When set, timer only runs while INT(0,1) is high. C/T : Counter/Timer select bit. M1 : Mode bit 1. M0 : Mode bit 0.

TMOD Register:

TCON Register: TF1: Timer 1 overflow flag. TR1: Timer 1 run control bit. TF0: Timer 0 overflag. TR0: Timer 0 run control bit. IE1: External interrupt 1 edge flag. IT1: External interrupt 1 type flag. IE0: External interrupt 0 edge flag. IT0: External interrupt 0 type flag.

TCON Register:

Interrupt :

Interrupt Enable Register : EA : Global enable/disable. --- : Undefined. ET2 :Enable Timer 2 interrupt. ES :Enable Serial port interrupt. ET1 :Enable Timer 1 interrupt. EX1 :Enable External 1 interrupt. ET0 : Enable Timer 0 interrupt. EX0 : Enable External 0 interrupt.