Software Defined Radio Brad Freyberg, JunYong Lee, SungHo Yoon, Uttara Kumar, Tingting Zou Project Description System Design The goal of our project is.

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Software Defined Radio Brad Freyberg, JunYong Lee, SungHo Yoon, Uttara Kumar, Tingting Zou Project Description System Design The goal of our project is to implement the communication modules, that constitute a traditional radio, in software and to successfully demonstrate wireless communication using our system. Software Defined Radio attempts to place much or most of the complex signal handling involved in communications receivers and transmitters into software. Doing this allows these radios to be configured ‘on-the-fly’ providing the much needed flexibility which is the growing demand of any modern communication system today. Hardware Components TMS320F28335 DSC All of our software modules are implemented on this 150 MHz floating point TI Digital Signal Controller It has 2 on-chip 12 bit, 16 channel ADCs with 2 parallel sample and hold circuits ideal for IQ modulation 6 high resolution PWM pins combined with a low pass filter are configured as the DACs in our system IQ modulator This board essentially modulates the I and Q waveforms to carrier frequency of 500Mhz Inputs : Clock, I and Q waveforms Outputs: Modulated waveform to the antenna tuner board Spartan-3 FPGA Connected directly to the DSC through SPI bus Configured to graph the received data on the IQ constellation plot through a VGA display Antenna Tuner Board The RF front end that tunes the antenna to the carrier frequency It has OpAmps on it for magnifying received signal Turn On Rx Initial start up samples Look for M-seq found m-seq Phase correction Frequency correction User triggers 1 st m-seq Print GFX ● Print character array ● Print full I, Q ●“animate” the drawing Data array is filled Receiving & decoding data ● Fill up character array(data) (fixed length) ● Save I, Q decision samples First byte after m-seq (packet countdown)is # of packets to expect Turn On Tx Used for power calibration Stuck in this mode until Tx sends packet countdown =0 After GFX routine is finished, set mseq_found = 0 packet countdown >0 Data Packet Structure M-sequence 128 bits 8 bits15 bits Packet no. Data ( 15 bytes ) M-sequence This field specifies the 15 bit correlation sequence which detects the start of the data packet. Used for frequency, phase and timing calibration Packet no. : This field helps the receiver to keep track of the number of packets that are yet to arrive. For eg. a 2 in this field would inform that receiver that 2 data packets are to follow the current one and a value 0 indicates end of transmission. Data: This field contains the actual data being sent from the transmitter. System Overview Modulation Modulation is the process by which some characteristic (frequency, phase, amplitude, or combinations thereof) of a carrier frequency is varied in accordance with a digital signal. Inphase-Quadrature modulation: Transmit 2 carrier sinusoids phased shift by 90 degrees – Inphase component and Quadrature component. Carriers modulate the digital data to produce the I and Q waveforms. Filter g(t) Filter g(t) I Q Modulated Carrier Matched Filter The signal at the receiver is affected by noise resulting in a low SNR. Sampling this received waveform may result in a ‘0’ being interpreted as a ‘1’ or vice versa causing errors. SOLUTION ? Matched filter is an optimal linear filter that maximizes the signal-to-noise ratio(SNR) in AWGN channel Concept behind it : Calculate the correlation between the signal and filter  maximize the inner product  minimize the effect of channel noise  increase SNR Binary Phase Shift Keying ( BPSK) Phase-shift keying has information in the phase of sinusoidal waveform. In BPSK, the phase of the RF carrier is shifted 180 degrees in accordance with a digital bit stream. Conveys information using two distinct phases (π and 0) I and Q waveforms passed through the Matched filter in our system Synchronization M-sequence Correlator Peaks representing sample boundaries are matched up. Compare the slope with a threshold slope. The slope threshold: In the first samples (=2500 samples * 5 sec),the maximum value(power) is detected. Based on this, we calculate attenuation factor by comparing with the maximum power of wired communications. Slope threshold = Attenuation factor * MSEQ_SLOPE_THRESHOLD If (current slope > predefined slope threshold), m-sequence is detected. Phase Offset Reason : No information of the transmitted signal’s phase at the receiver side When the peak is found, we take the latest I,Q sample from the matched filter. I, Q samples represent the last bits of m-sequence, so we correct the I, Q samples by measuring degree difference on the IQ plot. Frequency Offset Reason : The frequency of the oscillators at the transmitter and receiver is not exactly same When the peak is found, we take every alternate of the last samples of the m-sequence. M-sequence: [1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 1, 1] Used Linear Regression Equation to estimate frequency offset per a bit: ΔƟ_total Time varying IQ values Fixed IQ values Ɵ Detected I,Q values Correct I,Q values