Overview of the LLRF Activities at SLAC R. Akre*, Z. Geng, B. Hong, D. Brown, S. Condamoor, K. Kim, R. Larsen, J. Olsen, Vojtech Pacak, R. Ragle, D. Van Winkle, C. Xu SLAC National Accelerator Laboratory, Menlo Park, CA, 94025, U.S.A. October 1st, 2013 Overview of the LLRF Activities at SLAC—LLRF 2013 Page 1

SLAC Facilities Overview

Outline PAD/PAC based LLRF System at SLAC System Architecture Phase and Amplitude Detector (PAD) and Controller (PAC) Projects Adopting the Pizza Box based LLRF System MicroTCA Development for LLRF Highlights of the Technology Results from a Prototype

LCLS LCLS required upgrades of LLRF system: PAC--Fast phase and amplitude control => FPGA + DAC + I/Q Modulator + Solid-state Amplifiers PAD--Precise phase and amplitude measurement => Down Converter + I/Q Sampling + Digital Demodulation Fast data acquisition and pulse-to-pulse control at 120 Hz => EPICS + Fast Private Network

Architecture of the LLRF System for LCLS Measurement and control are done locally for each RF station. A new 1KW Solid-State Amp drives Klystron. Data process and feedback algorithm are performed in the central VME controller Ethernet was used for communications – good for 120 Hz operation, but almost at the limits

Phase and Amplitude Detector and Controller --PAD and PAC 4 Chan - 130MSPS, 16 bit ADCs LTC2208 In PAD First PAC built in 2006 Phase and Amplitude measurement result One of the DownMix Channels

Projects with PAD/PAC Based LLRF System LCLS—LINAC Coherent Light Source 13 Fast Control RF stations (Injector, L1S, L1X, etc.) Phase Amplitude Control for LLRF Reference and Laser Drive System ASTA—Accelerator Structure Test Area for photocathode QE and beam emittance study Reference System for LLRF and Laser. Feedback control for Gun RF signals with one Klystron Station XTCAV—X-Band Transvers Deflector for Femtosecond Electron/X-ray Pulse Length Measurements The X-Band Frequency Generator and the Fast Feedback System A New Modulator Klystron Support Unit (MKSUII) replaces the >25 year legacy unit XTA—X-Band Test Area for Compact Photo-injector with X-Band Structures. Customized X-Band Frequency Generator is implemented in the existing NLCTA Test Hall. PADs/PACs are used for several RF stations.

Motivations Limits of PAD/PAC based LLRF System A feedback control loop has to follow the chain of PAD-VME-PAC connected with Ethernet, the real-time performance is limited. It is not possible to do intra-pulse control (pulse width ~ 3 µs) Computation power of the Coldfire MCU used in PAD/PAC chassis is quite limited. One more Channel Access client connected to the EPICS software in the Coldfire MCU can significantly degrade its real-time performance One PAD chassis (2U or 3U) only contains 4 ADC channels. Channel density is low to efficiently use the rack space Custom designed chassis is difficult to maintain New requirements to LLRF System Capability for intra-pulse feedback More ADC channels Fast waveform acquisition at 120 Hz More complicated data processing

LLRF Frequency Reference Consists of 14 Chassis located in a temperature controlled enclosure Generate S-band Ref/LO, X-band Ref/LO, ADC clock and Gun laser clock signals with required stabilities

Recent Phase Noise Measurements of the Frequency Reference System 476MHz Master Oscillator and the 60W Amplifier upgrades improved the MDL. With the LO and Clock, a phase measurement resolution of 0.005 degree RMS within 1.2 MHz bandwidth can be achieved. 476MHz : 22fSrms 10Hz to 10MHz 2856MHz : 21fSrms 10Hz to 10MHz 476MHz = 22fSrms 2856MHz = 21fSrms 2830.5MHz = 21fSrms 25.5MHz = 165fSrms 119MHz = 51fSrms 102MHz = 65fSrms 2830.5MHz : 21fSrms 10Hz to 1MHz 119MHz : 51fSrms 10Hz to 10MHz Overview of the LLRF Activities at SLAC—LLRF 2013 Page 10

Architecture of MicroTCA based LLRF System RF Support Chassis is for down conversion, up conversion and klystron high voltage conditioning AMC board contains ADC, DAC and FPGA for RF detection and actuation CPU and EVR locate in the same crate as the ADC board Interconnections are via PCI Express

MicroTCA Crate and FPGA AMC Board Vadatech MCH UTC002 ADLINK AMC-1000 CPU Struck SIS8300 AMC (Virtex 5 FPGA ; 4 lane PCI Express; 10 Channels 125 MS/s 16-bit ADC; Two 250 MS/s 16-bit DACs; Twin SFP Card Cages) Overview of the LLRF Activities at SLAC—LLRF 2013 Page 12 12

FPGA Firmware Design Fast real-time functions for the RF station control: I/Q demodulation Intra-pulse phase amplitude control RF pulse generation I/Q modulator calibration

Control Algorithm Pulse-Pulse Feedback Implemented in software as a real-time thread Use vector summation of multiple signal as an input for the feedback loop Pulse-Pulse Feedback corrects slow drift Intra-Pulse Feedback Implemented in FPGA Correction only works for the same pulse The feedback algorithm compares RF pulse and Intra-Pulse I/Q set points table and accumulates the error for the given window. The result is applied to feed- forward value for another later window when the beam is accelerated Intra-Pulse Feedback takes care fast random jitter

Software Architecture Computation Nodes Software Architecture in CPU Pulse-to-pulse feedback and real-time data acquisition is done with EPICS software in MicroTCA CPU Up to 6 AMC ADC boards are controlled by the same CPU Integration with Timing system (EVR) and provide Beam Synchronous Acquisition (BSA) Support function for Intra-Pulse Feedback: Loop Phase/Gain Compensation and Loop Phase/Gain Correction

Prototype Installed at LCLS Linac (LI28-2) SSSB RF Support Chassis 6-slot MTCA Crate MKSUII (Interlock)

Summary PAD/PAC systems work robustly and will be continuously supported and maintained for LCLS and other projects MicroTCA system has been proved to be a powerful and compact solution, providing improved control capabilities and performance Future development for Linac upgrades or new projects could be built/enforced with the experience of MicroTCA.

Note and References Note: Ron Akre passed away on April 2nd, 2012. References: [1] P. Emma, “LCLS-II Conceptual Design Review,” SLAC, April 8, 2011, Chapter 6, Accelerator [2] Z. Geng, “LCLS-II Injector LLRF System-MicroTCA Based Design”, SLAC, June, 4, 2012, SLAC AIP Report [3] Z. Geng, “LCLS-II Low Level RF Controls”, FAC Presentation, SLAC, February 27-28, 2013 [4] Z. Geng, “LCLS-II Injector LLRF Final Design Report”, SLAC, January, 23, 2013 [5] R. Akre, “Linac Coherent Light Source (LCLS) Low Level RF System”, SLAC, September, 19, 2006, LCLS LLRF Review [6] C.G. Limborg-Deprey*, C. Adolphsen, et al. “COMMISSIONING OF THE X-BAND TEST AREA AT SLAC”, MOPB029, Proceedings of LINAC2012, Tel-Aviv, Israel [7] E. Jongewaard et al., “RF GUN PHOTOCATHODE RESEARCH AT SLAC”, IPAC2012, New Orleans, Louisiana, USA [8] R. Akre et al., “Commissioning the Linac Coherent Light Source Injector”, Phys. Rev. ST Accel. Beams 11, 030703 (2008) [9] Y. Ding et al., “Femtosecond Electron and X-ray Beam Temporal Diagnostics Using an X-band Transverse Deflector at LCLS”, Phys. Rev. ST Accel. Beams 14, 120701 (2011) [10] P. Krejcik et al., “Engineering design of the new LCLS X-Band Transverse Deflecting Cavity”, IBIC 2013, Sept. 16th, 2013, Oxford, UK

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