So far, all of the logic circuits we have studied were basically based on the analysis and design of combinational digital circuits. The other major aspect of a digital system is the ANALYSIS and DESIGN of sequential digital circuits.

The main characteristic of combinational logic circuits is that their output values depend on their present input values. Sequential logic circuits differ from combinational logic circuits because they contain memory elements so that their output values depend on both present and past input values.

 Combinational Circuits – the logic circuits whose outputs at any instant of time depend only on the input signals present at the time.  Sequential Circuits – the logic circuits whose outputs at any instant of time depend the present inputs as well as on the past outputs. It consists of combinational circuits to which memory elements are connected to form a feedback path.

MEMORY ELEMENTS These are the devices capable of restoring binary information within them. The binary info stored in memory elements at any given time defines the state of sequential circuit. The sequential circuit receives binary information from external inputs. These inputs together with the present state of memory elements determine the binary value at output terminals.

 Memory Element – is a medium in which one bit of information (0 or 1) can be stored or retained until necessary, and thereafter its contents can be replaced by a new value.

Sequential circuits can be Asynchronous or synchronous.  Asynchronous sequential circuits change their states and output values whenever a change in input values occurs.  Synchronous sequential circuits change their states and output values at fixed points of time, i.e. clock signals.

MASTER CLOCK GENERATOR Synchronization is achieved by timing device called master clock generator which generates a periodic train of clock pulses. CLOCKED SEQUENTIAL CIRCUIT Synchronous sequential circuits that use clock pulses in the inputs of the memory elements are called clock sequential circuit. The memory elements used in clocked sequential circuits are called flip-flops.

Block diagram of a sequential circuit NEX T STATE LOGIC MEMORY ELEMEN TS OUTPUT LOGIC CLOCK EXTERNAL OUTPUTS EXTERNAL INPUTS

Latches A latch is a memory element whose excitation signals control the state of the device. A latch has two stages set and reset. Set stage sets the output to 1. Reset stage set the output to 0. Flip-flops A flip-flop is a memory device that has clock signals control the state of the device.

Q Q’ INPUTS NORMAL OUTPUT INVERTED OUTPUT  The basic 1-bit digital memory circuit is known as a flip- flop. It can have two states either the 1 state or the 0 state.  It is also known as a bistable multivibrator. Flip-flops can be obtained by using NAND or NOR gates.

RS flip-flop Master Slave JK flip-flop T flip-flop D flip-flop JK flip-flop

RS Latch The RS latch is the basic memory element consists of two cross-coupled NOR gates. It has two input signals, S set signal and R reset signal. It also has two outputs Q and Q'; and two states, a set state when Q = 1 and a reset state when Q = 0 (Q' = 1).

SRQ 00 hold 01 0 reset 10 1 set 11 unstable

RS Latch excitation table SRQ(t)Q(t)Q(t+1) 0000 Hold Reset Q(t+1) = S(t) + R'(t)Q(t) Set Q + = S+ R'Q X Forbidden 111X

NAND implementation of Flip Flops Logic Diagram:

TRUTH TABLE SRQQ’ Invalid Value

NOR implementation of Flip Flops Logic Diagram:

TRUTH TABLE SRQQ’ Invalid Value

Clocked RS Flip-flop Logic Diagram:

TRUTH TABLE QSRQ(t + 1) Invalid

Make S and R complements of each other – Eliminates 1s catching problem – Can't just hold previous value (must have new value ready every clock period) – Value of D just before clock goes low is what is stored in flip-flop – Can make R-S flip-flop by adding logic to make D = S + R' Q.

D Q Q' master stage slave stage P P' CLK R SQ Q'R SQ

With a slight modification of a J-K flip-flop, we can construct a new flip flop called the T- FLIPFLOP. If the two inputs J and K of a J-K flip-flop are tied together it is referred to as a T-flip-flop. Hence a T flip-flop has only one input T and two outputs Q and Q’. The name T flip-flop actually indicates the fact that the flip- flop has the ability to TOGGLE. It has actually only two states TOGGLE STATE and MEMORY STATE.

The D flip-flop has only one input referred to as the D input, or data input, and two output as usual Q and Q’. It transfers the data at the input after the delay of one clock pulse at the output Q. So on some cases the input is referred to as a delay input and the flip-flop gates the name DELAY (D) flip-flop.

A master slave flip-flop consists of two latches and an inverter. Master-slave RS flip-flop

OUTPUT DECODER (combinational logic) MEMORY ELEMENTS NEXT STATE DECODER Outputs (in) Outputs (out) Next state variables(NS) NS=f(In,PS) Present state Variable(PS)

From the General sequential circuit model discussed in the preceding section, sequential circuits are generally classified into five different classes; 1.Class A Circuits 2.Class B Circuits 3.Class C Circuits 4.Class D Circuits 5.Class E Circuits

The Class A circuit is defined as a Mealy machine named after G.H. Mealy. The basic property of a mealy machine is that the output is a function of the present input conditions and the present state of the circuit. The Class B and C circuits are generally defined as a MOORE machine named after E.F. Moore. In these types of circuits the output is strictly a function of the present state (PS) of the circuit inputs. CLASS B CIRCUIT

OUTPUT DECODER MEMORY ELEMENTS NEXT STATE DECODER Outputs (in) Outputs (out)

MEMORY ELEMENTS NEXT STATE DECODER Inputs (in) Outputs (out) CLASS C CIRCUIT

MEMORY ELEMENTS NEXT STATE DECODER Inputs (in) Outputs (out) CLASS D CIRCUIT

MEMORY ELEMENTS Outputs (out) CLASS E CIRCUIT Inputs (in)

The behavior of a sequential circuit is determined from the inputs, the outputs, and the states of the flip-flops. Both the outputs and the next states are a function of the inputs and the present state. The analysis of sequential circuits consists of obtaining a table or a diagram for the time sequence of inputs, outputs, and internal states. Boolean expressions can be written that describes the behavior of the sequential circuits.

/0 1/0 0/0 1/01/1 0/0

In the state diagram, a state is represented by a circle and the transitions between states is indicated by direct arrows connecting the circles. The binary number inside each circle identifies the state the circle represents. The circle arrows are labeled with two binary numbers separated by a /. The number before the / represents the value of the external input, which causes the transition, and the number after the / represents the value of the output during the present state.

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1. ____________________ differ from combinational logic circuits because they contain memory elements so that their output values depend on both present and past input values. a. Sequential logic circuitsb. Logic circuits c. Sequential circuits 2. The logic circuits whose outputs at any instant of time depend the present inputs as well as on the past outputs. a. Sequential circuits b. Logic circuits c. Flip-flops

3. The logic circuits whose outputs at any instant of time depend only on the input signals present at the time. a. Combinational circuitsb. Flip-flopsc. Circuits 4. A sequential circuit that change their states and output values whenever a change in input values occurs. a. Asynchronous sequential circuits b. Circuitsc. Flip-flops

5. The basic 1-bit digital memory circuit is known as; a. Flip-flops b. Circuitsc. Logic Circuits 6. The ____ is the basic memory element consists of two cross-coupled NOR gates. a. RS latchb. D flip-flopc. T flip-flop

7.With a slight modification of a J-K flip-flop, we can construct a new flip flop called; a. T flip-flopb. D flip-flopc. RS latch 8. A ______ consists of two latches and an inverter. a. master slave flip-flopb. T flip-flopc. SR flip-flop

9. The Class A circuit is defined as a Mealy machine named after; a. G.H. Mealyb. E.F. Moorec. William Moore 10. The behavior of a sequential circuit is determined from the following except; a. Sequenceb. inputsc. outputs