Performance ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University of.

Slides:



Advertisements
Similar presentations
CS1104: Computer Organisation School of Computing National University of Singapore.
Advertisements

CS2100 Computer Organisation Performance (AY2014/2015) Semester 2.
ENEE350 Ankur Srivastava University of Maryland, College Park Based on Slides from Mary Jane Irwin ( )
810:142 Lecture 2: Performance Fall 2006 Chapter 4: Performance Adapted from Mary Jane Irwin at Penn State University for Computer Organization and Design,
ECE-C355 Computer Structures Winter 2008 Chapter 04: Understanding Performance Slides are adapted from Professor Mary Jane Irwin (
CSE431 L04 Understanding Performance.1Irwin, PSU, 2005 CSE 431 Computer Architecture Fall 2005 Lecture 04: Understanding Performance Mary Jane Irwin (
TU/e Processor Design 5Z032 1 Processor Design 5Z032 The role of Performance Henk Corporaal Eindhoven University of Technology 2009.
Performance COE 308 Computer Architecture Prof. Muhamed Mudawar Computer Engineering Department King Fahd University of Petroleum and Minerals.
Computer Organization and Architecture 18 th March, 2008.
Chapter 1 CSF 2009 Computer Performance. Defining Performance Which airplane has the best performance? Chapter 1 — Computer Abstractions and Technology.
CSCE 212 Chapter 4: Assessing and Understanding Performance Instructor: Jason D. Bakos.
Performance ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University of.
Chapter 4 Assessing and Understanding Performance Bo Cheng.
1 CSE SUNY New Paltz Chapter 2 Performance and Its Measurement.
Performance D. A. Patterson and J. L. Hennessey, Computer Organization & Design: The Hardware Software Interface, Morgan Kauffman, second edition 1998.
Computer ArchitectureFall 2007 © September 17, 2007 Karem Sakallah CS-447– Computer Architecture.
CS/ECE 3330 Computer Architecture Chapter 1 Performance / Power.
1 Chapter 4. 2 Measure, Report, and Summarize Make intelligent choices See through the marketing hype Key to understanding underlying organizational motivation.
Chapter 4 Assessing and Understanding Performance
Lecture 3: Computer Performance
1 Chapter 4. 2 Measure, Report, and Summarize Make intelligent choices See through the marketing hype Key to understanding underlying organizational motivation.
1 ECE3055 Computer Architecture and Operating Systems Lecture 2 Performance Prof. Hsien-Hsin Sean Lee School of Electrical and Computer Engineering Georgia.
Chapter 1 Section 1.4 Dr. Iyad F. Jafar Evaluating Performance.
Computer Organization and Design Performance Montek Singh Mon, April 4, 2011 Lecture 13.
1 Computer Performance: Metrics, Measurement, & Evaluation.
CSE 340 Computer Architecture Summer 2014 Understanding Performance
C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface 5 th Edition Chapter 1 Computer Abstractions and Technology Sections 1.5 – 1.11.
Performance.  Measure, Report, and Summarize  Make intelligent choices  See through the marketing hype  Key to understanding underlying organizational.
10/19/2015Erkay Savas1 Performance Computer Architecture – CS401 Erkay Savas Sabanci University.
1 CS/EE 362 Hardware Fundamentals Lecture 9 (Chapter 2: Hennessy and Patterson) Winter Quarter 1998 Chris Myers.
Performance.
1 CS465 Performance Revisited (Chapter 1) Be able to compare performance of simple system configurations and understand the performance implications of.
Performance Lecture notes from MKP, H. H. Lee and S. Yalamanchili.
CEN 316 Computer Organization and Design Assessing and Understanding Performance Mansour AL Zuair.
Lecture2: Performance Metrics Computer Architecture By Dr.Hadi Hassan 1/3/2016Dr. Hadi Hassan Computer Architecture 1.
1  1998 Morgan Kaufmann Publishers How to measure, report, and summarize performance (suorituskyky, tehokkuus)? What factors determine the performance.
Performance Performance
CS35101 – Computer Architecture Week 9: Understanding Performance Paul Durand ( ) [Adapted from M Irwin (
TEST 1 – Tuesday March 3 Lectures 1 - 8, Ch 1,2 HW Due Feb 24 –1.4.1 p.60 –1.4.4 p.60 –1.4.6 p.60 –1.5.2 p –1.5.4 p.61 –1.5.5 p.61.
September 10 Performance Read 3.1 through 3.4 for Wednesday Only 3 classes before 1 st Exam!
Performance – Last Lecture Bottom line performance measure is time Performance A = 1/Execution Time A Comparing Performance N = Performance A / Performance.
Chapter 4. Measure, Report, and Summarize Make intelligent choices See through the marketing hype Understanding underlying organizational aspects Why.
Lec2.1 Computer Architecture Chapter 2 The Role of Performance.
L12 – Performance 1 Comp 411 Computer Performance He said, to speed things up we need to squeeze the clock Study
Performance COE 301 Computer Organization Dr. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals.
EGRE 426 Computer Organization and Design Chapter 4.
ECE/CS 552: Benchmarks, Means and Amdahl’s Law © Prof. Mikko Lipasti Lecture notes based in part on slides created by Mark Hill, David Wood, Guri Sohi,
CMSC 611: Advanced Computer Architecture Performance & Benchmarks Some material adapted from Mohamed Younis, UMBC CMSC 611 Spr 2003 course slides Some.
Performance Computer Organization II 1 Computer Science Dept Va Tech January 2009 © McQuain & Ribbens Defining Performance Which airplane has.
Computer Architecture CSE 3322 Web Site crystal.uta.edu/~jpatters/cse3322 Send to Pramod Kumar, with the names and s.
Performance COE 301 / ICS 233 Computer Organization Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum.
BITS Pilani, Pilani Campus Today’s Agenda Role of Performance.
Chapter 1 Performance & Technology Trends. Outline What is computer architecture? Performance What is performance: latency (response time), throughput.
Lecture 3. Performance Prof. Taeweon Suh Computer Science & Engineering Korea University COSE222, COMP212, CYDF210 Computer Architecture.
Performance Lecture notes from MKP, H. H. Lee and S. Yalamanchili.
September 2 Performance Read 3.1 through 3.4 for Tuesday
Defining Performance Which airplane has the best performance?
Prof. Hsien-Hsin Sean Lee
Morgan Kaufmann Publishers
CSCE 212 Chapter 4: Assessing and Understanding Performance
CS2100 Computer Organisation
Performance COE 301 Computer Organization
Computer Performance He said, to speed things up we need to squeeze the clock.
Serial versus Pipelined Execution
Performance ICS 233 Computer Architecture and Assembly Language
Computer Performance Read Chapter 4
Performance.
Computer Organization and Design Chapter 4
CS2100 Computer Organisation
Presentation transcript:

Performance ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals [Adapted from slides of Dr. M. Mudawar, ICS 233, KFUPM]

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 2 Outline  Response Time and Throughput  Performance and Execution Time  Clock Cycles Per Instruction (CPI)  Single- vs. Multi-cycle CPU Performance  Amdahl’s Law  Benchmarks

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 3  How can we make intelligent choices about computers?  Why some computer hardware performs better at some programs, but performs less at other programs?  How do we measure the performance of a computer?  What factors are hardware related? software related?  How does machine’s instruction set affect performance?  Understanding performance is key to understanding underlying organizational motivation What is Performance?

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 4 Response Time and Throughput  Response Time  Time between start and completion of a task, as observed by end user  Response Time = CPU Time + Waiting Time (I/O, OS scheduling, etc.)  Throughput  Number of tasks the machine can run in a given period of time  Decreasing execution time improves throughput  Example: using a faster version of a processor  Less time to run a task  more tasks can be executed  Increasing throughput can also improve response time  Example: increasing number of processors in a multiprocessor  More tasks can be executed in parallel  Execution time of individual sequential tasks is not changed  But less waiting time in scheduling queue reduces response time

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 5  For some program running on machine X  X is n times faster than Y Book’s Definition of Performance Execution time X 1 Performance X = Performance Y Performance X Execution time X Execution time Y = n=

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 6  Real Elapsed Time  Counts everything:  Waiting time, Input/output, disk access, OS scheduling, … etc.  Useful number, but often not good for comparison purposes  Our Focus: CPU Execution Time  Time spent while executing the program instructions  Doesn't count the waiting time for I/O or OS scheduling  Can be measured in seconds, or  Can be related to number of CPU clock cycles What do we mean by Execution Time?

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 7  Clock cycle = Clock period = 1 / Clock rate  Clock rate = Clock frequency = Cycles per second  1 Hz = 1 cycle/sec1 KHz = 10 3 cycles/sec  1 MHz = 10 6 cycles/sec1 GHz = 10 9 cycles/sec  2 GHz clock has a cycle time = 1/(2×10 9 ) = 0.5 nanosecond (ns)  We often use clock cycles to report CPU execution time Clock Cycles Cycle 1Cycle 2Cycle 3 CPU Execution Time = CPU cycles × cycle time Clock rate CPU cycles =

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 8 Improving Performance  To improve performance, we need to  Reduce number of clock cycles required by a program, or  Reduce clock cycle time (increase the clock rate)  Example:  A program runs in 10 seconds on computer X with 2 GHz clock  What is the number of CPU cycles on computer X ?  We want to design computer Y to run same program in 6 seconds  But computer Y requires 10% more cycles to execute program  What is the clock rate for computer Y ?  Solution:  CPU cycles on computer X = 10 sec × 2 × 10 9 cycles/s = 20 × 10 9  CPU cycles on computer Y = 1.1 × 20 × 10 9 = 22 × 10 9 cycles  Clock rate for computer Y = 22 × 10 9 cycles / 6 sec = 3.67 GHz

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 9  Instructions take different number of cycles to execute  Multiplication takes more time than addition  Floating point operations take longer than integer ones  Accessing memory takes more time than accessing registers  CPI is an average number of clock cycles per instruction  Important point Changing the cycle time often changes the number of cycles required for various instructions (more later) Clock Cycles Per Instruction (CPI) 1 I1 cycles I2I3I6I4I5I CPI =14/7 = 2

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 10  To execute, a given program will require …  Some number of machine instructions  Some number of clock cycles  Some number of seconds  We can relate CPU clock cycles to instruction count  Performance Equation: (related to instruction count) Performance Equation CPU cycles = Instruction Count × CPI Time = Instruction Count × CPI × cycle time

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 11 I-CountCPICycle ProgramXX CompilerXX ISAXXX OrganizationXX TechnologyX Factors Impacting Performance Time = Instruction Count × CPI × cycle time

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 12  Suppose we have two implementations of the same ISA  For a given program  Machine A has a clock cycle time of 250 ps and a CPI of 2.2  Machine B has a clock cycle time of 500 ps and a CPI of 1.0  Which machine is faster for this program, and by how much?  Solution:  Both computers execute same count of instructions = I  CPU execution time (A) = I × 2.2 × 250 ps = 550 × I ps  CPU execution time (B) = I × 1.0 × 500 ps = 500 × I ps  Computer B is faster than A by a factor = = 1.1 Using the Performance Equation 550 × I 500 × I

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 13 Determining the CPI  Different types of instructions have different CPI Let CPI i = clocks per instruction for class i of instructions Let C i = instruction count for class i of instructions  Designers often obtain CPI by a detailed simulation  Hardware counters are also used for operational CPUs CPU cycles = (CPI i × C i ) i = 1 n ∑ CPI = (CPI i × C i ) i = 1 n ∑ n ∑ CiCi

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 14 Example on Determining the CPI  Problem A compiler designer is trying to decide between two code sequences for a particular machine. Based on the hardware implementation, there are three different classes of instructions: class A, class B, and class C, and they require one, two, and three cycles per instruction, respectively. The first code sequence has 5 instructions:2 of A, 1 of B, and 2 of C The second sequence has 6 instructions:4 of A, 1 of B, and 1 of C Compute the CPU cycles for each sequence. Which sequence is faster? What is the CPI for each sequence?  Solution CPU cycles (1 st sequence) = (2×1) + (1×2) + (2×3) = = 10 cycles CPU cycles (2 nd sequence) = (4×1) + (1×2) + (1×3) = = 9 cycles Second sequence is faster, even though it executes one extra instruction CPI (1 st sequence) = 10/5 = 2CPI (2 nd sequence) = 9/6 = 1.5

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 15 Given: instruction mix of a program on a RISC processor What is average CPI? What is the percent of time used by each instruction class? Class i Freq i CPI i ALU50%1 Load20%5 Store10%3 Branch20%2 How faster would the machine be if load time is 2 cycles? What if two ALU instructions could be executed at once? Second Example on CPI CPI i × Freq i 0.5×1 = ×5 = ×3 = ×2 = 0.4 %Time 0.5/2.2 = 23% 1.0/2.2 = 45% 0.3/2.2 = 14% 0.4/2.2 = 18% Average CPI = = 2.2

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 16 Single- vs. Multi-cycle CPU  Drawbacks of Single Cycle Processor: Long cycle time  All instructions take as much time as the slowest  Alternative Solution: Multicycle implementation  Break down instruction execution into multiple cycles Instruction Fetch Store ALUMemory Write Instruction Fetch ALU Reg ReadALU Instruction Fetch Branch Load Memory Read Instruction Fetch longest delay ALUReg Read ALU Instruction Fetch Jump Decode Reg Write

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 17 Single- vs. Multi-cycle CPU  Break instruction execution into five steps  Instruction fetch  Instruction decode and register read  Execution, memory address calculation, or branch completion  Memory access or ALU instruction completion  Load instruction completion  One step = One clock cycle (clock cycle is reduced)  First 2 steps are the same for all instructions Instruction # cyclesInstruction# cycles ALU & Store4Branch3 Load5Jump2

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 18 Single- vs. Multi-cycle Performance  Assume the following operation times for components:  Instruction and data memories: 200 ps  ALU and adders: 180 ps  Decode and Register file access (read or write): 150 ps  Ignore the delays in PC, mux, extender, and wires  Which of the following would be faster and by how much?  Single-cycle implementation for all instructions  Multicycle implementation optimized for every class of instructions  Assume the following instruction mix:  40% ALU, 20% Loads, 10% stores, 20% branches, & 10% jumps

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 19 Single- vs. Multi-cycle Performance Instruction Class Instruction Memory Register Read ALU Operation Data Memory Register Write Total ALU ps Load ps Store ps Branch ps Jump ps  For fixed single-cycle implementation:  Clock cycle =  For multi-cycle implementation:  Clock cycle =  Average CPI =  Speedup = decode and update PC 0.4× × ×4+ 0.2× ×2 = 3.8 max (200, 150, 180) = 200 ps (maximum delay at any step) 880 ps determined by longest delay (load instruction) 880 ps / (3.8 × 200 ps) = 880 / 760 = 1.16

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 20 Amdahl’s Law  Amdahl's Law is a measure of Speedup  How a computer performs after an enhancement E  Relative to how it performed previously  Enhancement improves a fraction f of execution time by a factor s and the remaining time is unaffected Performance with E Performance before ExTime before ExTime with E Speedup(E) == ExTime with E = ExTime before × (f /s + (1 – f )) Speedup(E) = (f /s + (1 – f )) 1

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 21  Suppose a program runs in 100 seconds on a machine, with multiply instruction responsible for 80 seconds of this time. How much do we have to improve the speed of multiplication if we want the program to run 4 times faster?  Solution: suppose we improve multiplication by a factor s 25 sec (4 times faster) = 80 sec / s + 20 sec s = 80 / (25 – 20) = 80 / 5 = 16 Improve the speed of multiplication by s = 16 times  How about making the program 5 times faster? 20 sec ( 5 times faster) = 80 sec / s + 20 sec s = 80 / (20 – 20) = ∞ Impossible to make 5 times faster! Example on Amdahl's Law

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 22 Benchmarks  Performance best obtained by running a real application  Use programs typical of expected workload  Representatives of expected classes of applications  Examples: compilers, editors, scientific applications, graphics,...  SPEC (System Performance Evaluation Corporation)  Funded and supported by a number of computer vendors  Companies have agreed on a set of real programs and inputs  Various benchmarks for … CPU performance, graphics, high-performance computing, client- server models, file systems, Web servers, etc.  Valuable indicator of performance (and compiler technology)

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 23 The SPEC CPU2000 Benchmarks 12 Integer benchmarks (C and C++)14 FP benchmarks (Fortran 77, 90, and C) Name Description Name Description gzipCompressionwupwiseQuantum chromodynamics vprFPGA placement and routingswimShallow water model gccGNU C compilermgridMultigrid solver in 3D potential field mcfCombinatorial optimizationappluPartial differential equation craftyChess programmesaThree-dimensional graphics library parserWord processing programgalgelComputational fluid dynamics eonComputer visualizationartNeural networks image recognition perlbmkPerl applicationequakeSeismic wave propagation simulation gapGroup theory, interpreterfacerecImage recognition of faces vortexObject-oriented databaseammpComputational chemistry bzip2CompressionlucasPrimality testing twolfPlace and route simulatorfma3dCrash simulation using finite elements sixtrackHigh-energy nuclear physics apsiMeteorology: pollutant distribution  Wall clock time is used as metric  Benchmarks measure CPU time, because of little I/O

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 24 SPEC 2000 Ratings (Pentium III & 4) SPEC ratio = Execution time is normalized relative to Sun Ultra 5 (300 MHz) SPEC rating = Geometric mean of SPEC ratios Note the relative positions of the CINT and CFP 2000 curves for the Pentium III & 4 Pentium III does better at the integer benchmarks, while Pentium 4 does better at the floating-point benchmarks due to its advanced SSE2 instructions

PerformanceICS 233 – KFUPM © Muhamed Mudawar slide 25  Performance is specific to a particular program  Any measure of performance should reflect execution time  Total execution time is a consistent summary of performance  For a given ISA, performance improvements come from  Increases in clock rate (without increasing the CPI)  Improvements in processor organization that lower CPI  Compiler enhancements that lower CPI and/or instruction count  Algorithm/Language choices that affect instruction count  Pitfalls (things you should avoid)  Using a subset of the performance equation as a metric  Expecting improvement of one aspect of a computer to increase performance proportional to the size of improvement Things to Remember