Riyadh Philanthropic Society For Science Prince Sultan College For Woman Dept. of Computer & Information Sciences CS 251 Introduction to Computer Organization.

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Riyadh Philanthropic Society For Science Prince Sultan College For Woman Dept. of Computer & Information Sciences CS 251 Introduction to Computer Organization & Assembly Language Lecture Register Set

 From Lecture notes only  Organization of the 8086/8088 Microprocessors  Registers  Data Registers: AX, BX, CX, DX  Address Registers  Segment Registers: CS, DS, SS, ES  Pointer and Index Registers: SP, BP, SL, DL  Instruction Pointer: IP  Flag Register 8086 Register Set2

 The IBM personal family are all based on the Intel 8086 family of microprocessors.  The 8086/8088 processors have the simplest structure.  Most of the instructions we will study are 8086/8088 instructions.  Because the 8086 and 8088 have essentially the same internal structurethe name 8086 will be applied to both 8086 and  Registers in 8086 are 16 bits in size ( means 16 bits can be saved in them) 3

8086 Register Set4  Information inside microprocessors are stored in registers  The classification of the registers is done according to the function they perform  In general there are fourteen 16-bit registers  Data Registers  There are 4 general purpose data registers  They hold data for the operation  Address Registers  They are divided into segment, pointer, and index registers  They hold the address of the data or instruction in memory  Status Registers  It is called the FLAGS register  It keeps the current status of the processor

8086 Register Set5 AHAL BHBL CHCL DHDL AX BX CX DX CS DS SS ES SI DI SP BP IP Data Registers Segment Registers Pointer and Index Registers FLAGS Register

8086 Register Set  These four registers are available to the programmer for general data manipulation.  Even thought the processor can operate on data stored in memory, the same instruction is faster if data are stored in registers.  This is why modern processors tend to have a lot of registers.  The high and low bytes of these registers can be accessed separately.  Ex. The high byte of AX is called AH, and the low byte is called AL.  This arrangement gives us more registers to use when dealing with byte-size data.  In addition to being general purpose, each of these registers have a specific operation as well. 6

8086 Register Set  AX is the preferred register to use in the logic, arithmetic, and data transfer instructions (its use will generate the shortest machine code)  In multiplication and division operations, one of the numbers should be in AX or AL  Input and Output operations also require the use of AL and AX 7

8086 Register Set  Also serves as an address register  Ex. Table look-up instruction XLAT (used for translation) 8

8086 Register Set  Program Loop constructions are facilitated by the use of CX, which acts as a loop counter  CL is used as a count in instructions that shift and rotate bits 9

8086 Register Set  DX is used in multiplication and Division  It is also used in I/O operations 10

8086 Register Set  Address registers store addresses of instructions and data in memory  These values are used by the processor to access memory locations  In the 8086 processor (16-bit processor)  Memory is composed of bytes, each memory byte has an address starting with 0.  The processor assigns a 20-bit physical address to its memory locations  It is possible to address 2 20 =1,048,576 bytes (1 megabyte of memory)  The bytes in memory have addresses from 00000h to FFFFFh 11

8086 Register Set  It is a direct consequence of using a 20-bit address in a 16-bit processor  The addresses are too big to fit in a 16-bit register or memory word  8086 gets around this by partitioning its memory into segments 12

8086 Register Set  A memory segment is a block of 2 16 (64 K) consecutive memory bytes.  Each segment is identified by a segment number (16 bits)  The range for the segment number is 0000h to FFFF h  Within the segment, the memory location is specified by giving an offset  Offset: number of bytes from the beginning of a segment (16 bits)  Also the offset range is 0000h to FFFF h 13

8086 Register Set  A memory location can be specified by providing a segment number and an offset, written in the form Segment:Offset  The Segment: Offset is known as the logical Address  Ex. A4FB:4872h segment offset  To obtain a 20-bit physical address, the 8086 microprocessor first shifts the segment number by 4 bits to the left and then adds the offset  The physical address of A4FB:4872h is: A4FB0h h 20-bit physical address A9822h 14

8086 Register Set  For memory location whose physical address is specified by 1256Ah, give the address is segment:offset form for segments 1256h and 1240h  Physical address = segment x 10h + offset offset = physical address – segment x 10h  For segment 1256: offset = 1256Ah – (1256h x 10h) = Ah 1256:000Ah  For segment 1240: offset = 1256Ah – (1240h x 10h) = 16Ah 1240: 016Ah  Thus 1256Ah = 1256:000Ah = 1240:016Ah 15

8086 Register Set  A memory location has physical address 80FD2h. In what segment does it have offset BFD2h?  Physical address = segment x 10h + offset segment = (physical address - offset) / 10h segment = (80FD2h - BFD2h) / 10h = 7500h 16

8086 Register Set  A machine language program consists of instructions (code) and data  The stack is a data structure used by the processor to make procedure calls  The data, instructions, & stack parts of the program are loaded into different memory segments  They are called: data segment, code segment, and stack segment 17

8086 Register Set  There are four segment registers that the 8086 processor uses to keep track of the segment numbers in the program.  CS: Code Segment: holds the code (or instruction) segment number  DS: Data Segment: holds the data segment number  SS: Stack Segment: contains the stack segment number  ES: Extra Segment: it is used in case the program needs to access another data segment 18

8086 Register Set Processor Address Memory CS 0F8Ah 0F8A:0000 code segment begins DS 0F89h 0F89:0000 data segment begins SS 0F69h 0F69:0000 stack segment begins ES

8086 Register Set  The memory locations addressed by the segment registers are accessible  i.e. only four segments are active at a time  However, the content of the segment register could be modified in the program to address different segments 20

8086 Register Set  These registers usually point to (contains the offset addresses) of memory locations  Unlike the Segment registers, the pointer and index registers can be used for arithmetic and other operations as well.  Each of these registers, in addition to the general purpose functionality, has a specific task 21

8086 Register Set  SP ( Stack Pointer) register: used in conjunction with SS to access the stack segment  BP (Base Pointer) register: used primarily to access data on the stack. However, unlike SP, the BP can be used to access data on other segments  SI ( Source Index) register: used to point to memory locations in the data segment addressed by DS. By incrementing the contents of SI, we could easily access consecutive memory locations  DI (Destination Index) register: performs the same operation as SI. There is also a class of instructions, called string operations, that use DI to access memory locations addressed by ES. 22

8086 Register Set  I nstruction P ointer  To access instructions, the processor 8086 uses the registers CS and IP.  The CS register holds the segment number of the next instruction  The IP register holds the offset  IP is updated each time an instruction is executed so that it will point to the next instruction  Unlike other registers, the IP can’t be directly manipulated by an instruction (i.e. the instruction can’t have IP an operand) 23

8086 Register Set  Its function is to indicate the status of the processor  It sets individual bits called FLAGS  There are two kinds of flags:  Status Flags : Reflects the result of an instruction executed by the processor (ex. When a subtraction results in a 0, the ZF “Zero Flag” is set to 1, a subsequent instruction can examine the ZF and branch to some code that handles a zero result)  Control Flags: enable or disable certain operations of the processor (ex. If the IF “Interrupt Flag” is set to 0, inputs from the keyboard are ignored by the processor). 24