Lecture 0. Course Introduction

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Lecture 0. Course Introduction ECM583 Special Topics in Computer Systems Lecture 0. Course Introduction Prof. Taeweon Suh Computer Science Education Korea University

Course Information Instructor Prerequisite Textbook Office hours Prof. Taeweon Suh Prerequisite Computer Architecture, Operating Systems, Java and C-programming Textbook Beginning Android ADK with Arduino by Mario Bohmer, Apress, 2012 Office hours After class as needed By appointment at Lyceum 307 Class web http://esca.korea.ac.kr/ Contact Information suhtw@korea.ac.kr 02-3290-2397

Objectives Understand computer systems with hands-on experience with Android system and accessory board Utilize a computer system to play with real-world electronic components Discuss and devise lab materials for educating Computer Science to K-12 students Android Mega ADK IOIO for Android

Lab Environment Android tablet (or phone) + ADK (Android Open Accessory Development Kit) Board USB Cable

Lab Environment (Cont.) Hardware Nexus 7 Tablet or Personal Phone Arduino Mega ADK board Software GUI-based Arduino development tool Android Developer Tools with Eclipse for app programming

Computer Systems General-purpose computer systems Embedded Systems

A Computer System (till 2008) CPU Main Memory (DDR2) FSB (Front-Side Bus) North Bridge Graphics card DMI (Direct Media I/F) Peripheral devices South Bridge Hard disk USB PCIe card But, don’t forget the big picture!

Past, Present and More… Core i7 (Ivy Bridge) – based Systems Core 2 Duo – based Systems CPU North Bridge South Bridge Main Memory (DDR2) FSB (Front-Side Bus) DMI (Direct Media I/F) FDI or Flexible Display Interface is an interconnect created by Intel in order to allow the communication of the HD Graphics integrated GPU found on supported CPUs with the PCH southbridge where display connectors are attached. It provides a path between an Intel processor and an Intel southbridge on a computer motherboard which carries display data from the graphics controller (North Display) of the Intel processor package to the display connectors attached at some PCH (South Display) versions. Keep in mind that CPU and computer systems are evolving at a fast pace! FDI: Flexible Display Interface SPI: Serial Peripheral Interface SMBus: System Management Bus

iPhone Generations Original iPhone (iPhone 2G) June 2007 iPhone 3G iPhone 3GS June 2009 iPhone 4 June 2010 Sep. 2012 iPhone 5 Oct. 2011 iPhone 4S http://apple.wikia.com/wiki/IPhone_3G http://en.wikipedia.org/wiki/History_of_the_iPhone

Smartphone War http://www.sleetherz.com/2011/10/smartphone-war-in-fatal-three-way-iphone-4s-vs-droid-razr-vs-galaxy-nexus/

iPhone 4 Teardown http://www.ifixit.com/Teardown/iPhone-4-Teardown/3130/1 http://news.cnet.com/8301-13924_3-20006904-64.html GSM (Global System for Mobile communications): 2G, 3G, 4G .. UMTS (Universal Mobile Telecommunications Systems): one of 3G technologies being developed into 4G

iPhone 4 Teardown 512MB Mobile DDR Audio Codec (Cirrus Logic) Samsung flash memory (32GB): K9PFG08 Audio Codec (Cirrus Logic) 512MB Mobile DDR A4 Processor (ARM Cortex A8) designed by Apple manufactured by Samsung GSM and more GSM (Global System for Mobile communications): 3G

iPhone 4 Teardown Accelerometer detects when the user has rotated the device from portrait to landscape, then automatically changes the contents of the display accordingly Proximity sensor detects when you lift iPhone to your ear and immediately turns off the display to save power and prevent inadvertent touches until iPhone is moved away Ambient light sensor automatically adjusts the display’s brightness to the appropriate level for the current ambient light, enhancing the user experience and saving power at the same time

iPhone 5 Teardown Accelerometer Touchscreen controller A6 application processor, based off the ARMv7 ISA 1GB Elpida LP (Low Power) DDR2 integrated according to Chipworks LTE modem 16GB NAND Flash from Hynix Wi-Fi module 3-axis gyroscope http://www.ifixit.com/Teardown/iPhone+5+Teardown/10525/2

Galaxy S3 Teardown Samsung 16GB eMMC (MultiMediCard) + 64MB NAND Flash Intel Wireless Processor Exynos 4412: Quad-core A9 with 1GB DDR2 http://www.ifixit.com/Teardown/Samsung-Galaxy-S-III-Teardown/ http://www.samsung.com/

Exynos 4412 Block Diagram PoP: Package-on-Package What is PoP Memory? DECEMBER 19, 2009 Package-on-Package or (PoP) memory was created as a way to reduce the physical size of the memory sub-system on a single board computer. The basic idea is to stack two BGA devices one on top of the other as shown above. PoP Memory has Several Advantages Including: More reliable manufacture because the memory sub-system can be assembled separately from the final system. Higher memory cycle speeds due to shorter connection lengths. Small size This type of memory is used in handsets and other types of portable devices and is also making it’s way into mid-level products as well. Disadvantages Include: BGA assemble issues, can only re-ball the part a limited number of times then it must be scrapped. So, for example, if the RAM portion fails, the FLASH could be de-soldered and re-soldered to a working RAM module, but only a limited number of times. Test issues – BGA packages do not allow access to device pins once the device is soldered down. In the case of a PoP module, since the top module is soldered to the bottom, there is no way to access the pins. Typically JTAG boundary-Scan tools can be used to test in this configuration. PoP: Package-on-Package

Galaxy Note Teardown Flip-chip DRAM on App. Processor K3PE7E700B-XXC1 low power 1GB DDR2 S5PC210 Exynos 4210 : ARM Cortex A9 (Dual-core) 1.4GHz with Mali-400 MP GPU

STMicroelectronics’ Gyroscope Galaxy Note Teardown LCD Driver Yamaha Audio Codec Audio Processor STMicroelectronics’ Gyroscope

Atmega2560 Overview Timer/Counter 8-bit CPU Internal memories 4KB EEPROM 256KB Flash 8KB SRAM

Grading Policy K-12 Education Proposal & Project: 60% Class Presentations: 40%

Backup Slides

Atmega328 Overview Internal memories 32KB Flash 1KB EEPROM 2KB SRAM 8-bit CPU Timer/Counter Serial Peripheral Interface Universal Synchronous and Asynchronous serial Receiver and Transmitter (Serial) 2-wire Serial Interface GPIO

Present, Near Future and More… Core i7– based Systems Core 2 Duo – based Systems Main Memory (DDR2) Main Memory (DDR3) CPU CPU FSB (Front-Side Bus) Quickpath (Intel) or Hypertransport (AMD) North Bridge North Bridge South Bridge South Bridge DMI (Direct Media I/F) DMI (Direct Media I/F) Keep in mind that CPU and computer systems are evolving at a fast pace