1 Shift Registers

–Definitions –I/O Types: serial, parallel, combinations –Direction: left, right, bidirectional –Applications –VHDL implementations MSI Shift Registers Serial Communications 2 DQ Input Clock DQDQDQ Q3Q3 Q2Q2 Q1Q1 Q0Q0 Enable Output

Shift Registers Using registers to store, manipulate and transfer data 3

Definition Register: Group of FFs. Each is capable of storing 1-bit of information. A register is a digital circuit with two basic functions: Data Storage and Data Movement –A shift register provides the data movement function –A shift register “shifts” its output once every clock cycle A shift register is a group of flip-flops set up in a linear fashion with their inputs and outputs connected together in such a way that the data is shifted from one device to another when the circuit is active 4

Shift Register Applications communications –UART converting between serial data and parallel data temporary storage in a processor –scratch-pad memories some arithmetic operations –multiply, divide some counter applications –Johnson counter –ring counter time delay devices more … 5

Shift Register Characteristics 6 Types –Serial-in, Serial-out –Serial-in, Parallel-out –Parallel-in, Serial-out –Parallel-in, Parallel-out –Universal Direction –Left shift –Right shift –Rotate (right or left) –Bidirectional n-bit shift register

Data Movement The bits in a shift register can move in any of the following manners 7

n-bit shift register Data Movement Block diagrams for shift registers with various input/output options: 8 n-bit shift register

Serial-In Serial-Out Data bits come in one at a time and leave one at a time One Flip-Flop for each bit to be handled Movement can be left or right, but is usually only a single direction in a given register Asynchronous preset and clear inputs are used to set initial values 9

Serial-In Serial-Out The logic circuit diagram below shows a generalized serial-in serial-out shift register –SR Flip-Flops are shown –Connected to behave as D Flip-Flops –Input values moved to outputs of each Flip-Flop with the clock (shift) pulse 10 N-Bit Shift Register 0N 1

Shift Registers The simplest shift register is one that uses only Flip-Flops The output of a given Flip-Flop is connected to the D input of the Flip-Flop at its right. Each clock pulse shifts the contents of the register one bit position to the right. The Serial input (SI) determines what goes into the leftmost Flip- Flop during the shift. The Serial output (SO) is taken from the output of the rightmost Flip-Flop. 11 Q Q Q Q

Serial-In Serial-Out A simple way of looking at the serial shifting operation, with a focus on the data bits, is illustrated at right The 4-bit data word “1011” is to be shifted into a 4-bit shift register One shift per clock pulse Data is shown entering at left and shifting right

Serial-In Serial-Out Serial -in The diagram shows the 4-bit sequence “1010” being loaded into the 4-bit serial-in serial-out shift register Each bit moves one position to the right each time the clock’s leading edge occurs Four clock pulses loads the register 13

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Serial-In Serial-Out Serial -out This diagram shows the 4-bit sequence “1010” as it is unloaded from the 4-bit serial-in serial- out shift register Each bit moves one position to the right each time the clock’s leading edge occurs Four clock pulses unloads the register 15

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17 Serial-In Serial-Out Serial-in, serial-out shift registers are often used for data communications –such as RS-232 –modem transmission and reception –Ethernet links –SONET –etc.

Serial-to-Parallel Conversion We often need to convert from serial to parallel –e.g., after receiving a series transmission It consists of serial i/p and outputs are taken from all the FF’s parallel Once the data is stored each bit appears on its respective output line.(rather than bit-by- bit as in SISO. Note that we could also use the Q of the right-most Flip- Flop as a serial-out output 18 n-bit shift register

SIPO 19

Clock pulseInputQAQBQCQD XXXX First pulse Second pulse Third pulse Fourth pulse X X 0 11X XXX The Serial information (information coming in bit by bit) is now available on the Q outputs in parallel.

21 Serial-to-Parallel Conversion We would use a serial-in parallel-out shift register of arbitrary length N to convert an N-bit word from serial to parallel It would require N clock pulse to LOAD and one clock pulse to UNLOAD

Serial-to-Parallel Conversion These two shift registers are used to convert serial data to parallel data The upper shift register would “grab” the data once it was shifted into the lower register 22

MSI Shift Registers 74LS164 8-Bit Serial-In Parallel-Out Shift Register 23

IC bit SIPO 24

Parallel-to-Serial Conversion We use a Parallel-in Serial-out Shift Register The DATA is applied in parallel form to the parallel input pins PA to PD of the register It is then read out sequentially from the register one bit at a time from PA to PD on each clock cycle in a serial format One clock pulse to load Four pulses to unload 25 n-bit shift register

26 Parallel-to-Serial Conversion Logic circuit for a parallel-in, serial-out shift register PISO Shift/load –control line When Shift/load-LOW - AND (0) gates are enabled, allows parallel inputs. When Shift/load-HIGH -AND (0) gates are disabled, AND(1) gates are enabled, allows serial inputs. OR gates allow either normal shifting operation or parallel data-entry operation.

27 Mux-like

28 8-bit serial/parallel-in-serial-out IC 74165

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Parallel-In Parallel-Out Parallel-in Parallel-out Shift Registers can serve as a temporary storage device or as a time delay device The DATA is presented in a parallel format to the parallel input pins PA to PD and then shifted to the corresponding output pins QA to QD when the registers are clocked One clock pulse to load One pulse to unload 30

PIPO 31

PIPO 4-bit parallel shift register-IC

n-bit shift register Universal Shift Register Universal shift register Can do any combination of parallel and serial input/output operations Requires additional inputs to specify desired function Uses a Mux-like input gating 33 L/S A B A B F

34 Universal Shift Register Parallel-in, parallel-out shift register Mux-like

Universal Shift Register Parallel shift register (can serve as converting parallel-in to serial-out shifter): 35

4-Bit Universal Shift register 36

MSI Shift Registers 74LS194 4-Bit Bidirectional Universal Shift Register may be used in –serial-serial, –shift left, –shift right, –serial-parallel, –parallel-serial, –and parallel-parallel data register transfers 37

MSI Shift Registers 74LS194 4-Bit Bidirectional Universal Shift Register 38

MSI Shift Registers 74LS194 control inputs S1 and S0 39

MSI Shift Registers 74LS299 universal shift/storage register 40

MSI Shift Registers 74LS299 universal shift/storage register 41 S0 S1 D Q CP CD

APPLICATION 42

Serial Data Transmission Parallel-to-serial conversion for serial transmission 43 serial transmission media in: parallel data out: parallel data Destination module Source module

Shift-Register Counters-RING COUNTER If the output of a shift register is fed back to the input, a ring counter results. The data pattern contained within the shift register will recirculate as long as clock pulses are applied.

Shift-Register Counters RING COUNTER 45

Johnson Counter The switch-tail ring counter, also know as the Johnson counter overcomes some of the limitations of the ring counter. Like a ring counter a Johnson counter is a shift register fed back on its' self. It requires half the stages of a comparable ring counter for a given division ratio. If the complement output of a ring counter is fed back to the input instead of the true output, a Johnson counter results. The difference between a ring counter and a Johnson counter is which output of the last stage is fed back (Q or Q'). Ring counter- Q is fedback, whereas Johnson counter Q’ is fedback 46

SHIFT COUNTER Johnson Counter

Johnson Counter 48