1 High-Speed Digital Test & Measurement Chris Allen Course website URL people.eecs.ku.edu/~callen/713/EECS713.htm.

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Presentation transcript:

1 High-Speed Digital Test & Measurement Chris Allen Course website URL people.eecs.ku.edu/~callen/713/EECS713.htm

2 Topics Test equipment Oscilloscope characteristics Oscilloscope probes Passive probes Active probes Probe inductance from ground lead Design for test Test procedures Measuring noise margin Measuring timing margin Sensitivity to supply voltage variations Sensitivity to temperature variations Test vectors Future trends

3 Test equipment Oscilloscope characteristics Vertical amplifier bandwidth (typically specified as 3-dB BW, BW 3dB ) Limits the observed risetime of the measured signal The risetime of the vertical amplifier adds in root-sum-square (RSS) fashion to the circuit’s actual T r to yield a measured T r Note: to relate BW 3dB to T T = / BW 3dB

4 Test equipment Scope probe characteristics The probe connecting the oscilloscope to the circuit under test also has a frequency response, characterized by T r (probe), that affects the measurement. Including the contribution of the scope probe yields Consequently, the circuit’s actual risetime may be shorter than what measurements indicate. Example: Using a 500-MHz oscilloscope with a 1-GHz probe an 820-ps risetime is measured. What is the circuit’s actual risetime? 500 MHz  T r (vert amp) = 676 ps, 1 GHz  T r (probe) = 338 ps

5 Test equipment Scope probe characteristics The model for the probe includes an input capacitance in parallel with a high-value resistance, R 1 (9 MΩ) and an inductive ground lead. The scope is modeled as a high-value resistor, R 2, in parallel with an input capacitance, C 2.

6 Test equipment Scope probe characteristics At DC this arrangement produces a 10x attenuation by the voltage divider R 2 /(R 1 + R 2 ). At DC the impedance of the probe/scope is |Z meas | = 10 MΩ. At 100 MHz the impedance is (ignoring X L Ground Lead ) C 1 (12 pF)  |X C 1 | = 133  C 2 (20 pF)  |X C 2 | = 80  C 3 (55 pF)  |X C 3 | = 29  |Z meas |  |X C 1 + (X C 2 // X C 3 )| = 154  At higher frequencies, the probe/scope impedance decreases further. Simplified equivalent circuit

7 Test equipment Other measurement considerations The relatively low probe/scope impedance at high frequencies can load the circuit under test causing: changes in circuit performance corrupt measurements To avoid the loading problem we can use probes with less capacitance. Another option is to use active probes that use FET amplifiers to isolate measurement capacitance from the circuit under test.

8 Test equipment Active probes The FET in the active probe acts as a signal buffer. The probes’s input impedance is now the FET’s input impedance typical FET input capacitance < 1 pF high input resistance Consequently, active probes reduce circuit loading have a wide operating bandwidth (Tektronix active probe 500 MHz to 4 GHz) requires a bias voltage to power the FET amplifier Active probes can present a bias voltage to the probe tip useful for probing unterminated outputs

9 Test equipment Probe inductance from ground lead Oscilloscope measurements generally require a ground connection as a voltage reference. Typical scope probes have a ground lead wire for signal reference. This ground lead has significant inductance (100s of nH) and can act as an antenna (both radiating signals as well as coupling ambient RF signals into the measurement). A long ground lead presents a number of measurement problems increased T r (measured) crosstalk electromagnetic interference (EMI)

10 Test equipment Probe inductance from ground lead To avoid these problems we must reduce L gnd Special probe tip attachments provide a ground connection with reduced lead inductance (few nH) These can improve the measurement-induced errors affecting T r, crosstalk, and EMI However to effectively use these tip attachments all signals to be probed must have a nearby ground pad for the probe. Therefore generous use of ground metal on the board surface facilitates probing.

11 Test equipment Special probing fixtures The author discusses a low-cost, shop-built 21:1 probe built from a length of coaxial cable and a leaded 1-kΩ resistor. Benefits of this approach include high DC resistance of 1050 Ω (vs. 50 Ω of cable alone) low circuit loading, fast rise time ( T r ) minimal capacitance (~ 0.5 pF) 1-kΩ series resistance low cost Assumptions scope is terminated with 50 Ω (to reduce reflections) ground pad is available near the signal to be probed (short lead length)

12 Test equipment Special probing fixtures Low-cost, shop-built 21:1 probe (photo essay) from circuit under test: 125-MHz oscillator testing with passive probes testing with shop-built, wide bandwidth probe

13 Design for test Special probing fixtures Special test points can also be incorporated into the board design to ease the probing of high-speed signals.

14 Test procedures Once a digital circuit is functioning, it is useful to determine its operating margin Consider the variety of factors that contribute to this margin noise margin reflections timing margin temperature effects supply voltage effect Several tests are recommended to ensure reliable operation

15 Test procedures Noise margin / reflection testing By introducing additional noise at various nodes in the system, signals with noise sensitivity can be identified.  Useful in locating the source of intermittent errors. The Noise Source is composed of resistor, R, that develops thermal noise (broadband, random) which is then amplified to the desired level. Other noise generations approaches are available (e.g., communication noise sources).

16 Test procedures Timing testing By varying the relative timing of the clock and data signals, the timing margin can be estimated. Use of a coaxial delay line select a clock orremove a portion insert a short data line to of the line andsegment of be testedexpose the coppercoaxial line The opened trace can be readily repaired after testing Another method for making this measurement is to use an independent clock source, synchronized with variable phase control. Demonstrates usefulness of ground area on surface

17 Test procedures Testing tolerance to varying supply voltages, V EE, V TT Test to find out how sensitive your design is to voltage variations, to establish the supply voltage tolerances. This test demonstrates another advantage of separate V EE and V TT supplies, as opposed to These voltage variations can change threshold voltage and signal DC bias levels resulting in small timing changes. 

18 Test procedures Testing tolerance to varying temperature Variations in ambient temperature can change the device temperature which may result in significant propagation delay changes. The effect may be localized by selective temperature adjustment by applying local heat/cooling at the chip level to isolate the effect. Heat gun

19 Test procedures Test vectors At the device level, board level, or system level comprehensive testing requires exercising all circuit functions at speed, simultaneously. Testing functions independently is useful but not conclusive. Such testing requires that all inputs and expected outputs be specified. These are known as test vectors The inputs are used to stimulate the circuit and the responses are observed. The test vectors bring the circuit or system to a known state (e.g., reset, or all 0s) and then steps through all states of interest.

20 Test procedures Test vectors Such testing brings together all factors affecting performance including timing, crosstalk, EMI, noise on the power and ground. Such testing is often expensive and limited. It typically involves an extensive variety of test equipment, programming, and planning.

21 Future trends Application-driven advances Evolutionary and revolutionary advances require ever-increasing data rates and computational throughput in smaller packages while consuming less power. Leading applications include: computing (gaming consoles, super computers) sensors (fine resolution video, radar, RFID) wireless communication Emerging technologies energy harvesting (power derived from local environment) optical interconnects die-to-die (optical transmitters/receivers integrated into die) –may involve holographic reflectors or optically transparent substrates