Wireless RF Receiver Front-end System – Wei-Liang Chen Wei-Liang Chen Wireless RF Receiver Front-end System Yuan-Ze University, VLSI Systems Lab

Wireless RF Receiver Front-end System – Wei-Liang Chen Outline  Building Blocks  Frequency Synthesizer  References  Wireless RF Receiver Front-end  Demand in the Feature  Communications Infrastructure  Conclusions

Wireless RF Receiver Front-end System – Wei-Liang Chen Communications Infrastructure

Wireless RF Receiver Front-end System – Wei-Liang Chen Receiver Architecture LNA Antenna 5.2GHz Two Downconversion 2.6GHz LO RF Mixer 2.6GHz I Q IF Mixer LO DC(0Hz) 2.6GHz LNA: Low Noise Amplifier LO : Local Oscillator ex: 5.8GHz WLAN standard

Wireless RF Receiver Front-end System – Wei-Liang Chen Building Blocks * Low Noise Amplifier LNA Antenna Small Noisy Signal Amplified Signal Noise Source * The smaller noise contributed form LNA is better

Wireless RF Receiver Front-end System – Wei-Liang Chen Building Blocks (cont.) * Mixer & Local Oscillator (LO) Mixer RF IF IF : Down-conversion RF : Up-conversion * Mixer is a frequency converter * LO usually is a frequency synthesizer

Wireless RF Receiver Front-end System – Wei-Liang Chen Frequency Synthesizer  Why need frequency synthesizer? The crystal oscillator frequency is limited Synthesis technique provide more flexibility for application Integration consideration

Wireless RF Receiver Front-end System – Wei-Liang Chen Block Diagram of Synthesizer x(t) y(t) Phase Detector (PD): Serves as an “error amplifier” * Phase Locked Loop (PLL) frequency synthesizer Loop filter : A low pass filter VCO : Voltage controlled oscillator * The loop is considered “locked” ifis constant with time and the output frequency will be

Wireless RF Receiver Front-end System – Wei-Liang Chen Demand in the Feature  Low Power Consumption  High Data Transmission Speed  Multi-functions Integrated in one Chip

Wireless RF Receiver Front-end System – Wei-Liang Chen Conclusions Power Supply

Wireless RF Receiver Front-end System – Wei-Liang Chen References  [1] P. R. Gray, Some Considerations for Multistandard Wireless RF Modems  [2] B. Razavi, Design of Analog CMOS Integrated Circuits. Singapore: McGraw Hill,  [3] J. Craninckx and M. J. Steyaert, “A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors,” IEEE Journal of solid-state circuits, vol. 32, pp , May  [4] J. Bhattacharjee et al., ” A 5.8 GHz fully integrated low power low phase noise CMOS LC VCO for WLAN applications,” in Proc. IEEE Microwave Symposium Digest, 2002, pp