Implementation of Digital Front End Processing Algorithms with Portability Across Multiple Processing Platforms September 20-21, 2011 John Holland, Jeremy.

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Implementation of Digital Front End Processing Algorithms with Portability Across Multiple Processing Platforms September 20-21, 2011 John Holland, Jeremy W. Horner, Randy Kuning, David B. Oeffinger Northrop Grumman Corporation P.O. Box 1693 Baltimore, Maryland High Performance Embedded Computing (HPEC) Workshop 2011 Copyright 2011 Northrop Grumman Corporation. All Rights Reserved.

1) Requirements & Capabilities Determine system algorithm requirements Evaluate candidate hardware 2) Establish Trade Space Critical system requirements Limitations on implementation A Process for Implementing Algorithms Across Hardware Platforms Can use this process with any algorithm and implementation 2 3) Partitioning Trade Partition the architecture into technologies 4) Final Architectural Selection Copyright 2011 Northrop Grumman Corporation. All Rights Reserved.

Example: Digital Beamforming Digital Beamforming –Architecture elements: time delays, phase shifts, synchronization –Key Parameters: number of channels, number of beams, signal bandwidth, data bandwidth Hardware Implementation Options –Devices: ASIC, FPGA, multi-core processors, GPUs –Boards: COTS Custom Each implementation option offers a unique set of capabilities and limitations 3 Hardware Platform Capabilities and Limitations Digital Beamforming Architecture Copyright 2011 Northrop Grumman Corporation. All Rights Reserved.

Example Architecture: FPGAs on a Custom Board System Requirements –Process multiple channels Algorithm Requirements –Over 100 Giga-operations/second Trade Space Restrictions –Radiation-tolerant FPGAs Architecture achieves a balance between capability, flexibility, and cost 4 Data Dependencies –None between sub-bands –Significant dependencies between beams Candidate Architectures –Minimize number of devices –Increase number of subbands in a given device Architecture for FPGAs on a Custom Board Copyright 2011 Northrop Grumman Corporation. All Rights Reserved.

Results: Beamforming Architectures for Land, Air, Sea, and Space Full Custom – ASICs and Custom Board –Minimizes power, maximizes performance FPGA and Custom Board –Minimizes the number of FPGAs –Maximizes resource use COTS Modular Processor –Open system architecture using off-the-shelf hardware. COTS and Advanced Processors –Highly programmable An adaptable design process allows algorithm portability across platforms 5 Full Custom Digital Beamformer COTS Modular Processor Beamformer Copyright 2011 Northrop Grumman Corporation. All Rights Reserved.